參數(shù)資料
型號(hào)： ST52F514
廠商： 意法半導(dǎo)體
英文描述： 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI
中文描述： 8位重癥監(jiān)護(hù)病房智能控制單元兩個(gè)定時(shí)器/的PWM，模數(shù)轉(zhuǎn)換器，I2C，SPI和脊髓損傷
文件頁(yè)數(shù)： 42/106頁(yè)
文件大?。?/td> 1340K
代理商： ST52F514
ST52F510/F513/F514
42/106
5.6 Register Description
Interrupt Mask Register (INT_MASK)
Configuration Register 0 (00h) Read/Write
Reset Value: 0000 0000 (00h)
Bit 7:
MSKPB
Interrupt Mask Port B
0: Port B interrupt masked
1: Port B interrupt enabled
Bit 6:
MSKPA
Interrupt Mask Port A
0: Port A interrupt masked
1: Port A interrupt enabled
Bit 5:
MSKI2C
Interrupt Mask I
2
C Interface
0: I
2
C Interface interrupt masked
1: I
2
C Interface interrupt enabled
Bit 4:
MSKSPI
Interrupt Mask SPI
0: SPI interrupt masked
1: SPI interrupt enabled
Bit 3:
MSKSCI
Interrupt Mask SCI
0: SCI interrupt masked
1: SCI interrupt enabled
Bit 2:
MSKT1
Interrupt Mask PWM/Timer 1
0: Pwm/Timer 1 interrupt masked
1: Pwm/Timer 1 interrupt enabled
Bit 1:
MSKT0
Interrupt Mask Pwm/Timer 0
0: Pwm/Timer 0 interrupt masked
1: Pwm/Timer 0 interrupt enabled
Bit 0:
MSKAD
Interrupt Mask A/D Converter
0: A/D interrupt masked
1: A/D interrupt enabled
Interrupt Polarity Register (INT_POL)
Configuration Register 1 (01h) Read/Write
Reset Value: 0000 0000 (00h)
Bit 7-5: Not Used
Bit 4-3: See Timer 0 Registers Description
Bit 2:
POLPB
Port B Interrupt Polarity
0: The Port B interrupt is triggered on the
rising edge of the applied external signal.
1: The Port B interrupt is triggered on the
falling edge of the applied external signal.
Bit 1:
POLPA
Port A Interrupt Polarity
0: The Port A interrupt is triggered on the
rising edge of the applied external signal.
1: The Port A interrupt is triggered on the
falling edge of the applied external signal.
Bit 0:
POLNMI
Non Maskable Interrupt Polarity
0: The NMI is triggered on the rising edge of
the applied external signal.
1: The NMI is triggered on the falling edge of
the applied external signal.
High Priority Register (INT_PRL_H)
Configuration Register 2 (02h) Read/Write
Reset Value: 1111 1010 (0FAh)
Medium Priority Register (INT_PRL_M)
Configuration Register 3 (03h) Read/Write
Reset Value: 1100 0110 (0C6h)
7
0
MSKPB
MSKPA MSKI2C MSKSPI MSKSCI MSKT1
MSKT0
MSKAD
7
0
-
-
-
RESPOL STRPOL POLPB
POLPA POLNMI
7
0
PRL23
PRL22
PRL21
PRL20
PRL19
PRL18
PRL17
PRL16
7
0
PRL15
PRL14
PRL13
PRL12
PRL11
PRL10
PRL9
PRL8
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PDF描述
ST52F514FmM6 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI
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