參數(shù)資料
型號(hào): ST52F514
廠商: 意法半導(dǎo)體
英文描述: 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI
中文描述: 8位重癥監(jiān)護(hù)病房智能控制單元兩個(gè)定時(shí)器/的PWM,模數(shù)轉(zhuǎn)換器,I2C,SPI和脊髓損傷
文件頁(yè)數(shù): 28/106頁(yè)
文件大?。?/td> 1340K
代理商: ST52F514
ST52F510/F513/F514
28/106
Table 3.2 Output Registers
Mnemonic
Description
Address
PORT_A_OUT
Port A data Output Register
0
00h
PORT_B_OUT
Port B data Output Register
1
01h
PORT_C_OUT
Port C data Output Register
2
02h
-
Not Used
3
03h
-
Not Used
4
04h
SPI_OUT
Serial Peripheral Interface data Output Register
5
05h
I2C_OUT
I
2
C Interface data Output Register
6
06h
PWM0_COUNT_OUT_H
PWM/Timer 0 Counter Output Register (MSB)
7
07h
PWM0_COUNT_OUT_L
PWM/Timer 0 Counter Output Register (LSB)
8
08h
PWM0_RELOAD_H
PWM/Timer 0 Reload Register (MSB)
9
09h
PWM0_RELOAD_L
PWM/Timer 0 Reload Register (LSB)
10
0Ah
PWM1_COUNT_OUT_H
PWM/Timer 1 Counter Output Register (MSB)
11
0Bh
PWM1_COUNT_OUT_L
PWM/Timer 1 Counter Output Register (LSB)
12
0Ch
PWM1_RELOAD_H
PWM/Timer 1 Reload Register (MSB)
13
0Dh
PWM1_RELOAD_L
PWM/Timer 1 Reload Register (LSB)
14
0Eh
SCI_OUT
Serial Communication Interface TX data Output Register
23
017h
Table 3.3 Option Bytes
Mnemonic
Description
Address
OSC_CR
Oscillator Control Register
0
00h
CLK_SET
Clock Parameters
1
01h
OSC_SET
Oscillator Set-Up
2
02h
PLDV_CR
Programmable Low Voltage Detector Control Register
3
03h
WDT_EN
HW/SW Watchdog selector
4
04h
PG_LOCK
First Page Write Protected
5
05h
PG_UNLOCK
First Page not Write Protected
6
06h
WAKEUP
Wake Up from Halt Time
7
07h
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