參數(shù)資料
型號： ST10R272LT6
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 16-BIT, 50 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, TQFP-100
文件頁數(shù)： 64/77頁
文件大?。?/td> 707K
代理商： ST10R272LT6
67/77
ST10R272L - ELECTRICAL CHARACTERISTICS
1
Cycle as programmed, including MCTC waitstates (Example shows 0 MCTC WS).
2
The leading edge of the respective command depends on RW-delay.
3READY (or READY) sampled HIGH (resp. LOW) at this sampling point generates a
READY controlled waitstate, READY (resp. READY) sampled LOW (resp. HIGH) at this
sampling point terminates the currently running bus cycle.
4READY (resp. READY) may be deactivated in response to the trailing (rising) edge of the
corresponding command (RD or WR).
5
If the Asynchronous READY (or READY) signal does not fulfill the indicated setup and
hold times with respect to CLKOUT (e.g. because CLKOUT is not enabled), it must fulfill t
37 in order to be safely synchronized. This is guaranteed, if READY is removed in
response to the command (see Note 4)).
Figure 24 CLKOUT and READY/READY
Sync
READY
t35
t36
t35
t36
Async
READY
t58
t59
t58
t59
t37
3)
5)
t60
4)
see 6)
3)
CLKOUT
ALE
t30
t34
Sync
READY
t35
t36
t35
t36
Async
READY
t58
t59
t58
t59
waitstate
READY
MUX/Tristate 6)
t32
t33
t29
Running cycle 1)
t31
t37
3)
5)
Command
RD, WR
t60
4)
2)
7)
3)
1
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