參數(shù)資料
型號： SDC2200DUT3D
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： 1500 MHz, MICROPROCESSOR, CPGA453
封裝： OPGA-453
文件頁數(shù)： 83/102頁
文件大?。?/td> 3049K
代理商： SDC2200DUT3D
Chapter 10
Pin Descriptions
69
31994A—1August 2004
AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet
CLKIN, RSTCLK
(SYSCLK) Pins
Connect CLKIN with RSTCLK and name it SYSCLK. Connect
CLKIN# with RSTCLK# and name it SYSCLK#. Length match
the clocks from the clock generator to the Northbridge and
processor.
See “SYSCLK and SYSCLK#” on page 73 for more information.
CONNECT Pin
CONNECT is an input from the system used for power
management and clock-forward initialization at reset.
COREFB and
COREFB# Pins
COREFB and COREFB# are outputs to the system that provide
processor core voltage feedback to the system.
CPU_PRESENCE# Pin
CPU_PRESENCE# is connected to VSS on the processor
package. If pulled-up on the motherboard, CPU_PRESENCE#
may be used to detect the presence or absence of a processor in
the Socket A-style socket.
DBRDY and DBREQ#
Pins
DBRDY and DBREQ# are routed to the debug connector.
DBREQ# is tied to VCC_CORE with a pullup resistor.
FERR Pin
FERR is an output to the system that is asserted for any
unmasked numerical exception independent of the NE bit in
CR0. FERR is a push-pull active High signal that must be
inverted and level shifted to an active Low signal. For more
information about FERR and FERR#, see the “Required
Circuits ” chapter o f the AMD Athlon Processor- Base d
Motherboard Design Guide, order# 24363.
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