參數(shù)資料
型號(hào)： SDC2200DUT3D
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： 1500 MHz, MICROPROCESSOR, CPGA453
封裝： OPGA-453
文件頁(yè)數(shù)： 33/102頁(yè)
文件大?。?/td> 3049K
代理商： SDC2200DUT3D
24
333 FSB AMD Sempron Processor Model 10 with 256K L2 Cache Specifications
Chapter 6
AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet
31994A—1August 2004
6.4
333 FSB AMD Athlon System Bus DC Characteristics
Table 4 shows the DC characteristics of the AMD Athlon
system bus for this processor.
Table 4.
333 FSB AMD Athlon System Bus DC Characteristics
Symbol
Parameter
Condition
Min
Max
Units Notes
VREF
DC Input Reference Voltage
(0.5 x VCC_CORE)
–50
(0.5 x VCC_CORE)
+50
mV
1
IVREF_LEAK_P VREF Tristate Leakage Pullup
VIN = VREF Nominal
–100
A
IVREF_LEAK_N VREF Tristate Leakage Pulldown
VIN = VREF Nominal
100
A
VIH
Input High Voltage
VREF +200
VCC_CORE +500
mV
VIL
Input Low Voltage
–500
VREF –200
mV
ILEAK_P
Tristate Leakage Pullup
VIN = VSS
(Ground)
–1
mA
ILEAK_N
Tristate Leakage Pulldown
VIN = VCC_CORE
Nominal
1
mA
CIN
Input Pin Capacitance
4
7
pF
RON
Output Resistance
0.90 x RsetN,P
1.1 x RsetN,P
2
RsetP
Impedance Set Point, P Channel
40
70
2
RsetN
Impedance Set Point, N Channel
40
70
2
Notes:
1. VREF is nominally set to 50% of VCC_CORE with actual values that are specific to motherboard design implementation. VREF must be
created with a sufficiently accurate DC source and a sufficiently quiet AC response to adhere to the ± 50 mV specification listed
above.
2. Measured at VCC_CORE / 2.
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