參數(shù)資料
型號(hào)： SDC2200DUT3D
廠商： ADVANCED MICRO DEVICES INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 1500 MHz, MICROPROCESSOR, CPGA453
封裝： OPGA-453
文件頁(yè)數(shù)： 17/102頁(yè)
文件大?。?/td> 3049K
代理商： SDC2200DUT3D
Chapter 4
Power Management
9
31994A—1August 2004
AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet
4
Power Management
This chapter describes the power management control system
of the AMD Sempron Processor Model 10. The power
management features of the processor are compliant with the
ACPI 1.0b and ACPI 2.0 specifications.
4.1
Power Management States
The AMD Sempron processor model 10 supports low-power
Halt and Stop Grant states. These states are used by advanced
configuration and power interface (ACPI) enabled operating
systems for processor power management.
Figure 3 shows the power management states of the processor.
The figure includes the ACPI “Cx” naming convention for these
states.
Figure 3. AMD Sempron Processor Model 10 Power Management States
C1
Halt
C0
Working4
Execute HLT
SMI#, INTR, NMI, INIT#, RESET#
Inco
m
in
gProb
e
Pr
ob
e
Se
rv
ice
d
STP
CL
K#
a
ss
er
ted
STP
CLK
# as
serte
d 2
STP
CLK
# d
eass
erte
d 3
C2
Stop Grant
Cache Snoopable
Incoming Probe
Probe Serviced
Probe
State1
STP
CLK#
de
as
se
rted
(R
ea
dP
LVL
2r
egi
ster
or
thr
ottl
in
g)
S1
Stop Grant
Cache Not Snoopable
Sleep
STP
CLK
#
asse
rted
STP
CLK
#
dea
sser
ted
Note:
The AMD AthlonTM System Bus is connected during the following states:
1)
The Probe state
2)
During transitions between the Halt state and the C2 Stop Grant state
3)
During transitions between the C2 Stop Grant state and the Halt state
4)
C0 Working state
Software transitions
Hardware transitions
Legend
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