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參數(shù)資料
| 型號： | SCANPSC110FSCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28 |
| 封裝： | 0.300 INCH, MS-013, SOIC-28 |
| 文件頁數(shù)： | 4/25頁 |
| 文件大?。?/td> | 269K |
| 代理商： | SCANPSC110FSCX |
www.fairchildsemi.com
12
SCAN
PSC1
10
F
Level 2 Protocol (Continued)
If the PARKPAUSE instruction is given to a bridge whose
LSPs are parked in Pause-IR or Pause-DR, the parked
LSPs will become unparked when the SCANPSC110F’s
TAP controller is sequenced into the respective Pause
state.
The PARKPAUSE instruction was implemented with this
dual functionality to enable backplane testing (interconnect
testing between boards) with simultaneous Updates and
Captures.
Simultaneous Update and Capture of several boards can
be performed by parking LSPs of the different boards in the
Pause-DR TAP controller state, after shifting the data to be
updated into the boundary registers of the components on
each board. The broadcast address is used to select all
SCANPSC110Fs connected to the backplane. The PARK-
PAUSE
instruction
is
scanned
into
the
selected
SCANPSC110Fs and the SCANPSC110F TAP controllers
are sequenced to the Pause-DR state where the LSPs of
all SCANPSC110Fs become unparked. The local TAP con-
trollers are then sequenced through the Update-DR,
Select-DR, Capture-DR, Exit1-DR, and parked in the
Pause-DR state, as the SCANPSC110F TAP controller is
sequenced into the Update-DR state. When a LSP is
parked, it is removed from the active scan chain.
GOTOWAIT:
This
instruction
is
used
to
return
all
SCANPSC110Fs
to
the
Wait-For-Address
state.
All
unparked LSPs will be parked in the Test-Logic-Reset TAP
controller state (see Figure 5).
MODESEL: The MODESEL instruction inserts the mode
register into the active scan chain. The mode register
determines the LSPN configuration. Bit 7 of the mode reg-
ister is a read-only counter status flag.
MCGRSEL: This instruction inserts the multi-cast group
register (MCGR) into the active scan chain. The MCGR is
used to group SCANPSC110Fs into multi-cast groups for
parallel TAP sequencing (i.e., to simultaneously perform
identical scan operations).
SOFTRESET: This instruction causes all 3 Port configura-
tion controllers (Figure 4) to enter the Parked-TLR state,
which forces TMSLn HIGH; this parks each local port in the
Test-Logic-Reset state within 5 TCKBcycles.
LFSRSEL: This instruction inserts the linear feedback shift
register (LFSR) into the active scan chain, allowing a com-
pacted signature to be shifted out of the LFSR during the
Shift-DR state. (The signature is assumed to have been
computed during earlier LFSRON shift operations.) This
instruction disables the LFSR register’s feedback circuitry,
turning the LFSR into a standard 16-bit shift register. This
allows a signature to be shifted out of the register, or a
seed value to be shifted into it.
LFSRON: Once this instruction is executed, the linear
feedback shift register samples data from the active scan
path (including all unparked TDILn) during the Shift-DR
state. Data from the scan path is shifted into the linear
feedback shift register and compacted. This allows a serial
stream of data to be compressed into a 16-bit signature
that can subsequently be shifted out using the LFSRSEL
instruction. The linear feedback shift register is not placed
in the scan chain during this mode. Instead, the register
samples the active scan-chain data as it flows from the
LSPN to TDOB.
LFSROFF: This instruction terminates linear feedback shift
register sampling. The LFSR retains its current state after
receiving this instruction.
CNTRSEL: This instruction inserts the 32-bit TCK counter
shift register into the active scan chain. This allows the
user to program the number of “n” TCK cycles to send to
the parked local ports once the CNTRON instruction is
issued (e.g., for BIST operations). Note that to ensure com-
pletion of count-down, the SCANPSC110F should receive
at least “n” TCKB pulses.
CNTRON: This instruction enables the TCK counter. The
counter begins counting down on the first rising edge of
TCKB following the Update-IRTAP controller state and is
decremented on each rising edge of TCKB thereafter.
When the TCK counter reaches terminal count, “00000000”
Hex, TCKL of all parked LSP's is held LOW. The
CNTROFF instruction must be issued before unpark-
ing the LSPs of a SCANPSC110F whose counter has
reached terminal count. This function over-rides the
mode register TCK control bit (bit-3).
CNTROFF: This instruction disables the TCK counter, and
TCKL control is returned to the mode register (bit-3).
FIGURE 9. Local Scan Port Synchronization from Parked-TLR Instruction
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