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| 型號： | SCANPSC110FSCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28 |
| 封裝： | 0.300 INCH, MS-013, SOIC-28 |
| 文件頁數(shù)： | 20/25頁 |
| 文件大?。?/td> | 269K |
| 代理商： | SCANPSC110FSCX |
www.fairchildsemi.com
4
SCAN
PSC1
10
F
Overview of SCANPSC110F Bridge Functions
FIGURE 1. SCANPSC110F Bridge Architecture
SCANPSC110F BRIDGE ARCHITECTURE
Figure
1
shows
the
basic
architecture
of
the
SCANPSC110F. The device’s major functional blocks are
illustrated here. The TAP Controller, a 16-state state
machine, is the central control for the device. The instruc-
tion register and various test data registers can be scanned
to exercise the various functions of the SCANPSC110F
(these registers behave as defined in IEEE Std. 1149.1).
The SCANPSC110F selection controller provides the func-
tionality that allows the 1149.1 protocol to be used in a
multi-drop environment. It primarily compares the address
input
to
the
slot
identification
and
enables
the
SCANPSC110F for subsequent scan operations.
The Local Scan Port Network (LSPN) contains multiplexing
logic used to select different port configurations. The LSPN
control block contains the Local Scan Port Controllers
(LSPC) for each Local Scan Port (LSP1, LSP2, and LSP3).
This control block receives input from the SCANPSC110F
instruction register, mode register, and the TAP controller.
Each local port contains all four (4) boundary scan signals
needed to interface with the local TAPs.
SCANPSC110F BRIDGE STATE MACHINES
The SCANPSC110F is IEEE 1149.1-compatible, in that it
supports all required 1149.1 operations. In addition, it sup-
ports a higher level of protocol, (Level 1), that extends the
IEEE 1149.1 Std. to a multi-drop environment.
In multi-drop scan systems, a scan tester can select indi-
vidual SCANPSC110Fs for participation in upcoming scan
operations. SCANPSC110F “selection” is accomplished by
simultaneously scanning a device address out to multiple
SCANPSC110Fs. Through an on-chip address matching
process, only those SCANPSC110Fs whose statically-
assigned address matches the scanned-out address
become selected to receive further instructions from the
scan tester. SCANPSC110F selection is done using a
“Level-1” protocol, while follow-on instructions are sent to
selected SCANPSC110Fs by using a “Level-2” protocol.
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