
AMD Geode SC1200/SC1201 Processor Data Book
69
Signal Definitions
Revision 7.1
3.4.4
CRT/TFT Interface Signals
Signal Name
Ball No.
Type
Description
Mux
EBGA
TEPBGA
DDC_SCL
A20
Y1
O
DDC Serial Clock. This is the serial clock for
the VESA Display Data Channel interface. It
is used for monitor communications. The
DDC2B standard is supported by this inter-
face.
IDE_DATA10
DDC_SDA
C20
Y2
I/O
DDC Serial Data. This is the bidirectional
serial data signal for the VESA Display Data
Channel interface. It is used for monitor com-
munications. The DDC2B standard is sup-
ported by this interface.
IDE_DATA9
HSYNC
J1
A11
O
Horizontal Sync
---
VSYNC
J2
B11
O
Vertical Sync
---
VREF
P1
D16
I/O
Voltage Reference. Reference voltage for
CRT PLL and DAC. This signal reflects the
internal voltage reference. If internal voltage
reference is used (recommended), leave this
ball disconnected. If an external voltage ref-
erence is used, this input is tied to a 1.235V
reference.
---
SETRES
P2
B15
I
Set Resistor. This signal sets the current
level for the RED/GREEN/BLUE analog out-
puts. Typically, a 464
, 1% resistor is con-
nected between this ball and AVSSCRT.
---
On-Chip RAMDAC
RED
K1
B12
O
Analog Red, Green and Blue
---
GREEN
M3
A14
---
BLUE
N2
A15
---
TFT (External DAC) Interface
TFTDCK
A22
AA1
O
TFT Clock. Clock to external CRT DACs or
TFT.
IDE_RST#
J4
A10
GPIO17+ IOCS0#
TFTDE
C16
P2
O
TFT Data Enable. Can be used as blank sig-
nal to external CRT DACs.
IDE_CS1#
U3
B18
ACK#+VOPCK+
FPCICLK
FP_VDD_ON
B23
AB1
O
TFT Power Control. Used to enable power
to the Flat Panel display, with power
sequence timing.
IDE_DATA4
AL16
V30
GXCLK+TEST3
TFTD[17:0]
See
See
O
Digital RGB Data to TFT.
TFTD[5:0] - Connect to BLUE TFT inputs.
TFTD[11:6] - Connect to GREEN TFT inputs.
TFTD[17:12] - Connect to RED TFT inputs.
The TFT interface is
muxed with the IDE
interface or the Par-
allel Port/VOP inter-