
50
AMD Geode SC1200/SC1201 Processor Data Book
Signal Definitions
Revision 7.1
J2
C/BE1#
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D9
I/O
(PU22.5)
INPCI,
OPCI
J3
AD15
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A15
O
OPCI
J4
PAR
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D12
I/O
(PU22.5)
INPCI,
OPCI
J28
VPD2
I
INT
VIO
---
J29
VPD1
I
INT
VIO
---
J30
VPD0
I
INT
VIO
---
J31
GPIO39
I/O
(PU22.5)
INPCI,
OPCI
VIO
SERIRQ
I/O
INPCI,
OPCI
K1
AD11
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A11
O
OPCI
K2
VIO
PWR
---
K3
VSS
GND
---
K4
AD14
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A14
O
OPCI
K28
GPIO38/IRRX2
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
IRRX2 input is con-
nected to the input
path of GPIO38.
There is no logic
required to enable
IRRX2, just a sim-
ple connection.
Hence, when
GPIO38 is the
selected function,
IRRX2 is also
selected.
LPCPD#
O
OPCI
K29
VIO
PWR
---
K30
VSS
GND
---
K31
GPIO37
I/O
(PU22.5)
INPCI,
OPCI
VIO
LFRAME#
O
OPCI
L1
C/BE0#
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D8
I/O
(PU22.5)
INPCI,
OPCI
L2
AD9
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A9
O
OPCI
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
L3
AD10
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A10
O
OPCI
L4
AD12
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A12
O
OPCI
L28
GPIO36
I/O
(PU22.5)
INPCI,
OPCI
VIO
LDRQ#
I
INPCI
L29
GPIO35
I/O
(PU22.5)
INPCI,
OPCI
VIO
LAD3
I/O
(PU22.5)
INPCI,
OPCI
L30
GPIO34
I/O
(PU22.5)
INPCI,
OPCI
VIO
LAD2
I/O
(PU22.5)
INPCI,
OPCI
L31
GPIO33
I/O
(PU22.5)
INPCI,
OPCI
VIO
LAD1
I/O
(PU22.5)
INPCI,
OPCI
M1
VSS
GND
---
M2
AD7
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A7
O
OPCI
M3
VIO
PWR
---
M4
AD8
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A8
O
OPCI
M28
GPIO32
I/O
(PU22.5)
INPCI,
OPCI
VIO
LAD0
I/O
(PU22.5)
INPCI,
OPCI
M29
GPIO13
I/O
(PU22.5)
INAB,
O8/8
VIO
PMR[19] = 0
AB2D
I/O
(PU22.5)
INAB,
OD8
VIO
PMR[19] = 1
M30
VIO
PWR
---
M31
VSS
GND
---
N1
AD3
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A3
O
OPCI
N2
AD6
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A6
O
OPCI
N3
AD5
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A5
O
OPCI
N4
VSS
GND
---
N13
VCORE
PWR
---
N14
VCORE
PWR
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration