
AMD Geode SC1200/SC1201 Processor Data Book
35
Signal Definitions
Revision 7.1
INIT#
O
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD5
O
O1/4
PMR[15] = 0) and
(PMR[27] = 0 and
FPCI_MON = 0)
VOPD4
O
O1/4
PMR[15] = 1) and
(PMR[27] = 0 and
FPCI_MON = 0)
SMI_O
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
Y4
VSS
GND
---
Y28
VSS
GND
---
MD46
I/O
INT,
TS2/5
VIO
---
Y30
VIO
PWR
---
MD47
I/O
INT,
TS2/5
VIO
---
I/O
INT,
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD6
O
O1/4
PMR[15] = 0) and
(PMR[27] = 0 and
FPCI_MON = 0)
VOPD5
O
O1/4
PMR[15] = 1) and
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD0
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
AA2
VSS
GND
---
I
INT, O1/
4
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD4
O
O1/4
PMR[15] = 0) and
(PMR[27] = 0 and
FPCI_MON = 0)
VOPD3
O
O1/4
PMR[15] = 1) and
(PMR[27] = 0 and
FPCI_MON = 0)
F_C/BE0#
O
O1/4
(PMR[27] = 1 or
FPCI_MON = 1)
AA4
VCORE
PWR
---
AA28
VCORE
PWR
---
MD44
I/O
INT,
TS2/5
VIO
---
AA30
VSS
GND
---
MD45
I/O
INT,
TS2/5
VIO
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
O
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD17
O
O1/4
(PMR[27] = 0 and
FPCI_MON = 0)
F_FRAME#
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
O
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD2
O
O1/4
PMR[15] = 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
VOPD1
O
O1/4
PMR[15] = 1) and
(PMR[27] = 0 and
FPCI_MON = 0)
INTR_O
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
AB3
CVBS
O
WIRE
AVCCTV See F4BAR0+
Memory Offset
C08h[4:3] bit
description on
YO
TVG
O
AB4
VSS
GND
---
AB28
VSS
GND
---
MD41
I/O
INT,
TS2/5
VIO
---
MD42
I/O
INT,
TS2/5
VIO
---
MD43
I/O
INT,
TS2/5
VIO
---
AC1
TVIOM
O
WIRE
AVCCTV ---
AC2
SVC
O
WIRE
AVCCTV See F4BAR0+
Memory Offset
C08h[4:3] bit
description on
Cr
O
Cb
O
TVB
O
TVR
O
AC3
AVCCTV
PWR
---
AC4
AVSSTV
GND
---
AC28
CKEA
O
O2/5
VIO
---
AC29
SDCLK0
O
O2/5
VIO
---
AC30
DQM5
O
O2/5
VIO
---
MD40
I/O
INT,
TS2/5
VIO
---
AD1
SVY
O
WIRE
AVCCTV See F4BAR0+
Memory Offset
C08h[4:3] bit
description on
TVR
O
Cb
O
CVBS
O
AD2
TVREF
I/O
WIRE
AVCCTV ---
AD3
CVBS
O
WIRE
AVCCTV See F4BAR0+
Memory Offset
C08h[4:3] bit
description on
Cr
O
TVB
O
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration