
52
AMD Geode SC1200/SC1201 Processor Data Book
Signal Definitions
Revision 7.1
U30
BIT_CLK
I
INT
VIO
FPCI_MON = 0
F_TRDY#
O
O1/4
FPCI_MON = 1
U31
SDATA_IN
I
INT
VIO
FPCI_MON = 0
F_GNT0#
O
O2/5
FPCI_MON = 1
V1
IDE_DATA15
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
TFTD7
O
O1/4
PMR[24] = 1
V2
IDE_DATA14
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
TFTD17
O
O1/4
PMR[24] = 1
V3
IDE_DATA13
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
TFTD15
O
O1/4
PMR[24] = 1
V4
VSS
GND
---
V13
VCORE
PWR
---
V14
VCORE
PWR
---
V15
VSS
GND
---
V16
VSS
GND
---
V17
VSS
GND
---
V18
VCORE
PWR
---
V19
VCORE
PWR
---
V28
VSS
GND
---
V29
SDCLK3
O
O2/5
VIO
---
V30
GXCLK
O
O2/5
VIO
(PMR[29] = 0 and
PMR[15] = 1)
FP_VDD_ON
O
O1/4
PMR[15] = 0
TEST3
O
O2/5
PMR[29] = 1 and
V31
GPIO16
I/O
(PU22.5)
INT, O2/
5
VIO
PMR[0] = 0 and
FPCI_MON = 0
PC_BEEP
O
O2/5
PMR[0] = 1 = 0 and
FPCI_MON = 0
F_DEVSEL#
O
O2/5
FPCI_MON = 1
W1
VIO
PWR
---
W2
VSS
GND
---
W3
IDE_DATA12
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
TFTD13
O
O1/4
PMR[24] = 1
W4
IDE_DATA11
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
GPIO41
I/O
INTS1,
O1/4
PMR[24] = 1
W13
VCORE
PWR
---
W14
VCORE
PWR
---
W15
VSS
GND
---
W16
VSS
GND
---
W17
VSS
GND
---
W18
VCORE
PWR
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
W19
VCORE
PWR
---
MD57
I/O
INT,
TS2/5
VIO
---
W29
SDCLK1
O
O2/5
VIO
---
W30
VSS
GND
---
W31
VIO
PWR
---
Y15
IDE_DATA10
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
DDC_SCL
O
OD4
PMR[24] = 1
IDE_DATA9
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
DDC_SDA
I/O
INT,
OD4
PMR[24] = 1
Y3
IDE_DATA8
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
GPIO40
I/O
INTS1,
O1/4
PMR[24] = 1
Y4
IDE_IOR0#
O
O1/4
VIO
PMR[24] = 0
TFTD10
O
O1/4
PMR[24] = 1
MD58
I/O
INT,
TS2/5
VIO
---
MD59
I/O
INT,
TS2/5
VIO
---
MD60
I/O
INT,
TS2/5
VIO
---
MD56
I/O
INT,
TS2/5
VIO
---
AA1
IDE_RST#
O
O1/4
VIO
PMR[24] = 0
TFTDCK
O
O1/4
PMR[24] = 1
AA2
IDE_DATA7
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
INTD#
I
INTS
PMR[24] = 1
AA3
IDE_DATA6
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
IRQ9
I
INTS1
PMR[24] = 1
AA4
IDE_DATA5
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
CLK27M
O
O1/4
PMR[24] = 1
AA28
SDCLK2
O
O2/5
VIO
---
MD61
I/O
INT,
TS2/5
VIO
---
MD62
I/O
INT,
TS2/5
VIO
---
MD63
I/O
INT,
TS2/5
VIO
---
AB1
IDE_DATA4
I/O
INTS1,
TS1/4
VIO
PMR[24] = 0
FP_VDD_ON
O
O1/4
PMR[24] = 1
AB2
VSS
GND
---
AB3
VIO
PWR
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration