參數(shù)資料
型號(hào): SAA7111
廠商: NXP Semiconductors N.V.
英文描述: Video Input Processor VIP
中文描述: 視頻輸入處理器貴賓
文件頁(yè)數(shù): 46/64頁(yè)
文件大?。?/td> 433K
代理商: SAA7111
1998 May 15
46
Philips Semiconductors
Product specification
Video Input Processor (VIP)
SAA7111
16.2.15 S
UBADDRESS
10
Table 26
Format/delay control SA 10
Table 27
VREF pulse position and length VRLN SA 10 (D3)
Note
1.
The numbers given in parenthesis refer to CCIR line counting.
Table 28
Fine position of HS HDEL0 and HDEL1 SA 10
Table 29
Output format selection OFTS0 and OFTS1 SA 10
LUMINANCE DELAY COMPENSATION
(STEPS IN 2/LLC)
CONTROL BITS D2 to D0
YDEL2
YDEL1
YDEL0
4...
...0...
...3
1
0
0
0
0
1
0
0
1
VRLN
VREF at 60 HZ 525 LINES
(1)
VREF at 50 HZ 625 LINES
0
1
0
1
Length
Line number
Field 1
Field 2
240
242
286
288
first
19 (22)
282 (285)
last
first
18 (21)
281 (284)
last
first
24
337
last
309
622
first
23
336
last
310
623
258 (261)
521 (524)
259 (262)
522 (525)
FINE POSITION OF HS WITH A STEP SIZE
OF 2/LLC
CONTROL BITS D5 and D4
HDEL1
HDEL0
0
1
2
3
0
0
1
1
0
1
0
1
FORMATS
CONTROL BITS D7 and D6
OFTS1
OFTS0
RGB 565, RGB 888 (dependent on control
bit RGB888) see Table 31
YUV 422 16 bits
YUV 411 12 bits
YUV CCIR-656 8 bits
0
0
0
1
1
1
0
1
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