參數(shù)資料
型號(hào): SAA7111
廠商: NXP Semiconductors N.V.
英文描述: Video Input Processor VIP
中文描述: 視頻輸入處理器貴賓
文件頁數(shù): 41/64頁
文件大小: 433K
代理商: SAA7111
1998 May 15
41
Philips Semiconductors
Product specification
Video Input Processor (VIP)
SAA7111
16.2.5
S
UBADDRESS
05
Table 16
Gain control analog (AIC04); static gain control channel 2 GAI2 SA 05
16.2.6
S
UBADDRESS
06
Table 17
Horizontal sync begin SA 06, D7 to D0
16.2.7
S
UBADDRESS
07
Table 18
Horizontal sync stop SA 07
\DECIMAL
VALUE
GAIN
(dB)
SIGN BIT
(SA 03, D1)
CONTROL BITS D7 to D0
GAI28
GAI27
GAI26
GAI25
GAI24
GAI23
GAI22
GAI21
GAI20
0....
....255
256....
....511
5.98
0
0
5.98
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DELAY TIME
(STEP SIZE = 8/LLC)
CONTROL BITS D7 to D0
HSB7
HSB6
HSB5
HSB4
HSB3
HSB2
HSB1
HSB0
128...
108
107...
...108 (50 Hz)
...107 (60 Hz)
109...127 (50 Hz)
108...127 (60 Hz)
forbidden (outside available central counter range)
0
1
1
0
1
0
1
0
0
0
1
1
0
1
1
1
1
0
0
0
1
1
0
1
forbidden (outside available central counter range)
DELAY TIME
(STEP SIZE = 8/LLC)
CONTROL BITS D7 to D0
HSS7
HSS6
HSS5
HSS4
HSS3
HSS2
HSS1
HSS0
128...
108
107...
...108 (50 Hz)
...107 (60 Hz)
109...127 (50 Hz)
108...127 (60 Hz)
forbidden (outside available central counter range)
0
1
1
0
1
0
1
0
0
0
1
1
0
1
1
1
1
0
0
0
1
1
0
1
forbidden (outside available central counter range)
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