參數(shù)資料
型號(hào)： S29PL032J65BFI150
廠商： SPANSION LLC
元件分類： PROM
英文描述： 2M X 16 FLASH 3V PROM, 65 ns, PBGA56
封裝： 7 X 9 MM, LEAD FREE, FBGA-56
文件頁(yè)數(shù)： 62/94頁(yè)
文件大?。?/td> 949K
代理商： S29PL032J65BFI150
July 29, 2005 S29PL-J_00_A8
S29PL-J
63
Advance
Information
Table 22 Sector Protection Command Definitions
Command (Notes)
Cyc
le
s
Bus Cycles (Notes 1-4)
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
Reset
1 XXX
F0
Secured Silicon
Sector Entry (16)
3 555
AA
2AA
55
555
88
Secured Silicon
Sector Exit (16)
4 555
AA
2AA
55
555
90
XX
00
Secured Silicon
Protection Bit
Program (Notes 5, 6)
6 555
AA
2AA
55
555
60
OW
68
OW
48
OW
RD
(0)
Secured Silicon
Protection Bit Status
5 555
AA
2AA
55
555
60
OW
48
OW
RD
(0)
Password Program
(Notes 5, 7, 8)
4 555
AA
2AA
55
555
38
XX
[0-3]
PD
[0-3]
Password Verify
(Notes 6, 8, 9)
4 555
AA
2AA
55
555
C8
PWA
[0-3]
PWD
[0-3]
Password Unlock
(Notes 7, 10, 11)
7 555
AA
2AA
55
555
28
PWA
[0]
PWD
[0]
PWA
[1]
PWD
[1]
PWA
[2]
PWD
[2]
PWA
[3]
PWD
[3]
PPB Program
(Notes 5, 6, 11)
6 555
AA
2AA
55
555
60
(SA)
WP
68
(SA)
WP
48
(SA)
WP
RD(0)
PPB Status
4 555
AA
2AA
55
555
90
(SA)
WP
RD
(0)
All PPB Erase
(Notes 5, 6, 13, 14)
6 555
AA
2AA
55
555
60
WP
60
(SA)
40
(SA)
WP
RD(0)
PPB Lock Bit Set
3 555
AA
2AA
55
555
78
PPB Lock Bit Status (15) 4 555
AA
2AA
55
555
58
SA
RD
(1)
DYB Write (7)
4 555
AA
2AA
55
555
48
SA
X1
DYB Erase (7)
4 555
AA
2AA
55
555
48
SA
X0
DYB Status (6)
4 555
AA
2AA
55
555
58
SA
RD
(0)
PPMLB Program
(Notes 5, 6, 12)
6 555
AA
2AA
55
555
60
PL
68
PL
48
PL
RD(0)
PPMLB Status (5)
5 555
AA
2AA
55
555
60
PL
48
PL
RD
(0)
SPMLB Program
(Notes 5, 6, 12)
6 555
AA
2AA
55
555
60
SL
68
SL
48
SL
RD(0)
SPMLB Status (5)
5 555
AA
2AA
55
555
60
SL
48
SL
RD
(0)
Legend:
DYB = Dynamic Protection Bit
OW = Address (A7:A0) is (00011010)
PD[3:0] = Password Data (1 of 4 portions)
PPB = Persistent Protection Bit
PWA = Password Address. A1:A0 selects portion of
password.
PWD = Password Data being verified.
PL = Password Protection Mode Lock Address (A7:A0) is
(00001010)
RD(0) = Read Data DQ0 for protection indicator bit.
RD(1) = Read Data DQ1 for PPB Lock status.
SA = Sector Address where security command applies.
Address bits Amax:A12 uniquely select any sector.
SL = Persistent Protection Mode Lock Address (A7:A0) is
(00010010)
WP = PPB Address (A7:A0) is (00000010)
X = Don’t care
PPMLB = Password Protection Mode Locking Bit
SPMLB = Persistent Protection Mode Locking Bit
Notes:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Shaded cells in table denote read cycles. All other
cycles are write operations.
4. During unlock and command cycles, when lower
address bits are 555 or 2AAh as shown in table,
address bits higher than A11 (except where BA is
required) and data bits higher than DQ7 are don’t
cares.
5. The reset command returns device to reading array.
6. Cycle 4 programs the addressed locking bit. Cycles 5
and 6 validate bit has been fully programmed when
DQ0 = 1. If DQ0 = 0 in cycle 6, program command
must be issued and verified again.
7. Data is latched on the rising edge of WE#.
8. Entire command sequence must be entered for each
portion of password.
9. Command sequence returns FFh if PPMLB is set.
10. The password is written over four consecutive cycles,
at addresses 0-3.
11. A 2 s timeout is required between any two portions of
password.
12. A 100 s timeout is required between cycles 4 and 5.
13. A 1.2 ms timeout is required between cycles 4 and 5.
14. Cycle 4 erases all PPBs. Cycles 5 and 6 validate bits
have been fully erased when DQ0 = 0. If DQ0 = 1 in
cycle 6, erase command must be issued and verified
again. Before issuing erase command, all PPBs should
be programmed to prevent PPB overerasure.
15. DQ1 = 1 if PPB locked, 0 if unlocked.
16. Once the Secured Silicon Sector Entry Command
sequence has been entered, the standard array cannot
be accessed until the Exit SecSi Sector command has
been entered or the device has been reset.
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