參數(shù)資料
型號: S29PL032J65BFI150
廠商: SPANSION LLC
元件分類: PROM
英文描述: 2M X 16 FLASH 3V PROM, 65 ns, PBGA56
封裝: 7 X 9 MM, LEAD FREE, FBGA-56
文件頁數(shù): 61/94頁
文件大小: 949K
代理商: S29PL032J65BFI150
62
S29PL-J
S29PL-J_00_A8 July 29, 2005
Ad van c e
Inf o rmation
Command Definitions Tables
Legend:
BA = Address of bank switching to autoselect mode, bypass mode, or erase operation. Determined by PL127J: Amax:A20,
PL064J and PL129J: Amax:A19, PL032J: Amax:A18.
PA = Program Address (Amax:A0). Addresses latch on falling edge of WE# or CE# (CE1#/CE2# for PL129J) pulse, whichever
happens later.
PD = Program Data (DQ15:DQ0) written to location PA. Data latches on rising edge of WE# or CE# (CE1#/CE2# for PL129J)
pulse, whichever happens first.
RA = Read Address (Amax:A0).
RD = Read Data (DQ15:DQ0) from location RA.
SA = Sector Address (Amax:A12) for verifying (in autoselect mode) or erasing.
WD = Write Data. See “Configuration Register” definition for specific write data. Data latched on rising edge of WE#.
X = Don’t care
Notes:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Shaded cells in table denote read cycles. All other cycles are write operations.
4. During unlock and command cycles, when lower address bits are 555 or 2AAh as shown in table, address bits higher
than A11 (except where BA is required) and data bits higher than DQ7 are don’t cares.
5. No unlock or command cycles required when bank is reading array data.
6. The Reset command is required to return to reading array (or to erase-suspend-read mode if previously in Erase
Suspend) when bank is in autoselect mode, or if DQ5 goes high (while bank is providing status information).
7. Fourth cycle of autoselect command sequence is a read cycle. System must provide bank address to obtain
manufacturer ID or device ID information. See Autoselect Command Sequence section for more information.
8. The data is DQ6=1 for factory and customer locked and DQ7=1 for factory locked.
9. The data is 00h for an unprotected sector group and 01h for a protected sector group.
10. Device ID must be read across cycles 4, 5, and 6. PL127J (X0Eh = 2220h, X0Fh = 2200h), PL129J (X0Eh = 2221h, X0Fh
= 2200h),PL064J (X0Eh = 2202h, X0Fh = 2201h), PL032J (X0Eh = 220Ah, X0Fh = 2201h).
11. System may read and program in non-erasing sectors, or enter autoselect mode, when in Program/Erase Suspend
mode. Program/Erase Suspend command is valid only during a sector erase operation, and requires bank address.
12. Program/Erase Resume command is valid only during Erase Suspend mode, and requires bank address.
13. Command is valid when device is ready to read array data or when device is in autoselect mode.
14. WP#/ACC must be at VID during the entire operation of command.
15. Unlock Bypass Entry command is required prior to any Unlock Bypass operation. Unlock Bypass Reset command is
required to return to the reading array.
Table 21 Memory Array Command Definitions
Command (Notes)
Cyc
le
s
Bus Cycles (Notes (1)–(4))
Addr Data Addr Data Addr Data
Addr
Data Addr Data Addr Data
Read (5)
1
RA
RD
Reset (6)
1 XXX
F0
A
u
to
sele
ct
Manufacturer ID
4
555
AA
2AA
55
(BA)
555
90
(BA)
X00
01
Device ID (10)
6
555
AA
2AA
55
(BA)
555
90
(BA)
X01
227E
(BA)
X0E
(BA)
X0F
Secured Silicon Sector
Factory Protect (8)
4
555
AA
2AA
55
(BA)
555
90
X03
Sector Group
Protect Verify(9)
4
555
AAA
2AA
55
(BA)
555
90
(SA) X02 XX00/
XX01
Program
4
555
AA
2AA
55
555
A0
PA
PD
Chip Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
555
10
Sector Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
SA
30
Program/Erase Suspend (11)
1
BA
B0
Program/Erase Resume (12)1
BA
30
CFI Query (13)
1
55
98
Accelerated Program (15)2
XX
A0
PA
PD
Unlock Bypass Entry (15)
3
555
AA
2AA
55
555
20
Unlock Bypass Program (15)2
XX
A0
PA
PD
Unlock Bypass Erase (15)
2
XX
80
XX
10
Unlock Bypass
CFI (Notes 13, 15)
1XX
98
Unlock Bypass Reset (15)
2 XXX
90
XXX
00
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