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參數(shù)資料
| 型號： | S1D15G10D08B000 |
| 廠商： | 愛普生（中國）有限公司 |
| 英文描述： | LCD drivers equipped with the liquid crystal drive power circuit |
| 中文描述： | 與液晶驅(qū)動電源電路配備LCD驅(qū)動器 |
| 文件頁數(shù)： | 63/64頁 |
| 文件大?。?/td> | 434K |
| 代理商： | S1D15G10D08B000 |
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S1D15G10D08B000
60
EPSON
Rev. 1.0
14. EEPROM INTERFACE
The S1D15G10D00B chips provide the Write and Read functions to write the Electronic Control value and built-in
resistance ratio into and read them from the peripheral EEPROM (S1F17A10). Using the Write and Read functions,
you can store these values appropriate to each LCP panel.
14.1 Conditions when EEPROM read/write is performed
1
The built-in oscillator circuit is already operating.
2
The CL division by 2 and 132 display lines have been set by the Display Control command.
14.2 EEPROM writing instructions
1. Issue the VOLCTR command to set the appropriate Electronic Control value and built-in resistance ratio.
2. Issue the EPCTIN command to select the Control EEPROM mode (for data writing).
3. Issue the EPMWR command to write data into the EEPROM.
4. Issue the EPCTOUT command to cancel the EEPROM Control mode.
14.3 EEPROM data reading instructions
1. Issue the EPCTIN command to select the EEPROM Control mode (for data reading).
2. Issue the EPMRD command to read data from the EEPROM.
3. Issue the EPCTOUT command to cancel the EEPROM Control mode and updates the Electronic Control value and
built-in resistance ratio using the read data.
Miscellaneous:
The MPU can read the Electronic Control value and built-in resistance ratio by issuing a combination of EPSRRD1 or
EPSRRD2 and STREAD (Status Read) commands.
Notes: As the EPCTIN, EPCWR and EPCRD commands require the following processing times, use a software
timer or insert a process to loop the operation by monitoring the status read value of D2 (Access to
EEPROM). If these times are insufficient, the Read or Write operation may fail.
5
4
fosc
/
1
EPCTIN
sec
(
)
2
EPCWR
10
320
fosc
/
10
fosc
/
sec
(
)
3
EPCRD
4
sec
(
)
14.4 Connection example
S1D15G10 and S1F17A10 connection example.
V
DD
for both chips is connected to the same potential.
V
DD
GND
V
DD
GND
SDA
SCK
XRST
SDA
CLOCK
RESET
S1D15G10D08B100
S1F17A10
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