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參數(shù)資料
| 型號： | S1D15G10D08B000 |
| 廠商： | 愛普生（中國）有限公司 |
| 英文描述： | LCD drivers equipped with the liquid crystal drive power circuit |
| 中文描述： | 與液晶驅(qū)動(dòng)電源電路配備LCD驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 13/64頁 |
| 文件大?。?/td> | 434K |
| 代理商： | S1D15G10D08B000 |
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S1D15G10D08B000
10
EPSON
Rev. 1.0
Pin name
I/O
Description
Number of
pins
1
M/S
I
This pin is used to select either the master or slave operation.
M/S = HIGH: Master operation
It is used to select the display clock.
CLS = HIGH: Built-in CR oscillation is used.
CLS = LOW: External clock is used.
When the external clock is used (CLS = LOW), the signal is
entered to CL pin.
This pin inputs or outputs the display clock.
It outputs the display clock only when M/S = HIGH and CLS = HIGH.
Other than the above: External clock input
This pin inputs or outputs the liquid crystal frame signal.
M/S = HIGH: Outputs the signal
M/S = LOW: Inputs the signal
This pin inputs or outputs the liquid crystal synchronization signal.
M/S = HIGH: Outputs the signal
M/S = LOW: Inputs the signal
This pin inputs or outputs the field start signal.
M/S = HIGH: Outputs the signal
M/S = LOW: Inputs the signal
This pin inputs or outputs the drive pattern signal.
M/S = HIGH: Outputs the signal
M/S = LOW: Inputs the signal
This pin is used to control blanking of liquid crystal display.
M/S = HIGH: Outputs the signal
M/S = LOW: Inputs the signal
This pin inputs or outputs the line clock.
M/S = HIGH: Outputs the signal
M/S = LOW: Inputs the signal
They output the signal for the segment drive of liquid crystal.
They output the signal for common drive of liquid crystal.
CLS
I
1
CL
I/O
1
FR
I/O
1
SYNC
I/O
1
CA
I/O
1
F1, F2
I/O
1
DOFF
I/O
1
YSCL
I/O
1
SEGn
COMn
O
O
396
132
7.4 Liquid Crystal Drive Circuit Signals
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