參數(shù)資料
型號: S1D13700
廠商: 愛普生(中國)有限公司
英文描述: Embedded Memory Graphics LCD Controller
中文描述: 嵌入式內存圖形液晶顯示控制器
文件頁數(shù): 59/134頁
文件大小: 1000K
代理商: S1D13700
Epson Research and Development
Vancouver Design Center
Page 59
Hardware Functional Specification
Issue Date: 2004/01/06
S1D13700
X42A-A-001-00
Revision 1.0
bits 7-0
Screen Block 2 Size (SL2) bits [7:0]
These bits determine the size of screen block 2, in lines.
REG[10h] bits 7-0 = screen block 2 size in number of lines - 1
Note
The relationship between the screen block start address (SADx), screen block size
(SLx), and the display mode is described in Table 10-7 “Display Modes,” on page 60.
bits 15-0
Screen Block 3 Start Address (SAD3) bits [15:0]
These bits determine the memory start address of screen block 3.
bits 15-0
Screen Block 4 Start Address (SAD4) bits [15:0]
These bits determine the memory start address of screen block 4.
The following table summaries the required settings for each possible display mode.
REG[10h] Screen Block 2 Size Register
Address = 8010h
Read/Write
Screen Block 2 Size bits 7-0
7
6
5
4
3
2
1
0
REG[11h] Screen Block 3 Start Address Register 0
Address = 8011h
Read/Write
Screen Block 3 Start Address bits 7-0 (LSB)
7
6
5
4
3
2
1
0
REG[12h] Screen Block 3 Start Address Register 1
Address = 8012h
Read/Write
Screen Block 3 Start Address bits 15-8 (MSB)
7
6
5
4
3
2
1
0
REG[13h] Screen Block 4 Start Address Register 0
Address = 8013h
Read/Write
Screen Block 4 Start Address bits 7-0 (LSB)
7
6
5
4
3
2
1
0
REG[14h] Screen Block 4 Start Address Register 1
Address = 8014h
Read/Write
Screen Block 4 Start Address bits 15-8 (MSB)
7
6
5
4
3
2
1
0
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