參數資料
型號: S1D13700
廠商: 愛普生(中國)有限公司
英文描述: Embedded Memory Graphics LCD Controller
中文描述: 嵌入式內存圖形液晶顯示控制器
文件頁數: 130/134頁
文件大小: 1000K
代理商: S1D13700
Page 130
Epson Research and Development
Vancouver Design Center
S1D13700
X42A-A-001-00
Hardware Functional Specification
Issue Date: 2004/01/06
Revision 1.0
section 5.2.3, changed CLKI power to HIOVDD
section 5.4, changed WAIT# pin mapping to WAIT#/DTACK# or unconnected for indi-
rect interfaces
table 6-2, changed NIOVin max to NIOVDD instead of HIOVDD
table 6-3, changed Voh min to VDD-0.4 instead of HIOVDD-0.4
table 6-4, removed Vih2/Vil2 and renamed Vih1/Vil1 to Vih/Vil, also renamed Vh1 to
Vh
table 6-5, added new tables that references the cell types associated with each electrical
characteristic
section 7, added note about pin capacitance
section 7.2, changed RES to RESET#
section 7.3, updated CPU Interface timing to Generic Direct/Indirect with/without
WAIT# and MC68K Direct/Indirect with/without WAIT#
section 7.3.1, for t11/t12 changed "...WAIT# is/is not asserted..." to "...WAIT# is/is not
used..."
section 7.3.3, for t11/t12 changed "...WAIT# is/is not asserted..." to "...WAIT# is/is not
used..."
section 7.4, updated Power Save Mode/Display Enable Timng parameters and values
section 7.5, updated LCD timing diagrams and added 2 new parameters
section 8, removed the CGROM area from the memory map
section 9.1, updated clock diagram, added CLKI/OSC logic
section 9.2, added descriptions for system clock and FPSHIFT clock
REG[00h] bit 4, changed bit to “reserved with a default of 1”
REG[00h] bit 3, removed diagram for left and right dual panel display
REG[00h] bit 3, updated note about adjusting SL to compensate for the shift in charac-
ters
REG[00h] bit 0, updated Character Generator Select bit to mention that if the CGROM
is used, the CGRAM can only support up to 64 8x8 characters
REG[02h], removed comment about setting to 00h when graphics mode is enabled
REG[03h], updated bit description and added reference to C/R formulas
REG[04h], updated bit description and added reference to TC/R formulas
REG[0Ah] bits 1-0, changed frequency of option 10 to "...(approx 2Hz)..."
REG[0Ah] bits 7-2, seperated the Display Attribute bits for each address block
REG[17h], clarified the possible movement for the Cursor Shift Direction bits
REG[18h] bit 4, changed bit name from "Overlay Select" to "3 Layer Overlay Select"
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