參數(shù)資料
型號: S1D13700
廠商: 愛普生(中國)有限公司
英文描述: Embedded Memory Graphics LCD Controller
中文描述: 嵌入式內(nèi)存圖形液晶顯示控制器
文件頁數(shù): 46/134頁
文件大?。?/td> 1000K
代理商: S1D13700
Page 46
Epson Research and Development
Vancouver Design Center
S1D13700
X42A-A-001-00
Hardware Functional Specification
Issue Date: 2004/01/06
Revision 1.0
9.2.2 FPSHIFT Clock
The FPSHIFT clock is derived from the internal system clock as shown in Figure 9-1:
“Clock Diagram,” on page 45. The maximum frequency possible for FPSHIFT clock is
15MHz.
9.3 Oscillator Circuit
The S1D13700 design incorporates an oscillator circuit. A stable oscillator can be
constructed by connecting an AT-cut crystal, two capacitors, and two resistors to XCG1
and XCD1, as shown in the figure below. If the oscillator frequency is increased, Cd and
Cg should be decreased proportionally.
Note
The circuit board lines to XCG1 and XCD1 must be as short as possible to prevent wir-
ing capacitance from changing the oscillator frequency or increasing the power con-
sumption.
Figure 9-2 Crystal Oscillator
Table 9-1 Crystal Oscillator Circuit Parameters
Symbol
Min
2
Typ
Max
18
Units
f
OSC
T
OSC
Rf
40
MHz
1/f
OSC
1
ns
M
k
pF
Rd
100
Cg
10
Cd
3
10
20
pF
S1D13700
XCD1
XCG1
Cg
Rf
Cd
Xtal
Rd
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