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參數(shù)資料
| 型號： | S1C6P366D0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4.1 MHz, MICROCONTROLLER, UUC102 |
| 封裝： | DIE-102 |
| 文件頁數(shù)： | 80/84頁 |
| 文件大?。?/td> | 1740K |
| 代理商： | S1C6P366D0A0100 |
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S1C6P366 TECHNICAL MANUAL
EPSON
71
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Programmble Timer)
PTRST0: Timer 0 reset (reload) (FFC2HD1)
PTRST1: Timer 1 reset (reload) (FFC3HD1)
Resets the timer and presets reload data to the counter.
When "1" is written: Reset
When "0" is written: No operation
Reading: Always "0"
By writing "1" to PTRST0, the reload data in the reload register PLD00–PLD07 is preset to the counter in
timer 0. Similarly, the reload data in PLD10–PLD17 is preset to the counter in timer 1 by PTRST1.
When the counter is preset in the RUN status, the counter restarts immediately after presetting. In the
case of STOP status, the reload data is preset to the counter and is maintained.
No operation results when "0" is written.
Since these bits are exclusively for writing, always set to "0" during reading.
PTRUN0: Timer 0 RUN/STOP control register (FFC2HD0)
PTRUN1: Timer 1 RUN/STOP control register (FFC3HD0)
Controls the RUN/STOP of the counter.
When "1" is written: RUN
When "0" is written: STOP
Reading: Valid
The counter in timer 0 starts counting down by writing "1" to the PTRUN0 register and stops by writing
"0".
In STOP status, the counter data is maintained until the counter is reset or is set in the next RUN status.
When STOP status changes to RUN status, the data that has been maintained can be used for resuming
the count.
Same as above, the timer 1 counter is controlled by the PTRUN1 register.
At initial reset, these registers are set to "0".
CHSEL: TOUT output channel selection register (FFC1HD3)
Selects the channel used for TOUT signal output.
When "1" is written: Timer 1
When "0" is written: Timer 0
Reading: Valid
This register selects which timer's underflow (timer 0 or timer 1) is used to generate a TOUT signal. When
"0" is written to the CHSEL register, timer 0 is selected and when "1" is written, timer 1 is selected. In the
16-bit
× 2 channels mode (MODE16 = "1"), timer 1 is always selected regardless of this register setting.
At initial reset, this register is set to "0".
PTOUT: TOUT output control register (FFC1HD2)
Turns TOUT signal output ON and OFF.
When "1" is written: ON
When "0" is written: OFF
Reading: Valid
PTOUT is the output control register for the TOUT signal. When "1" is written to the register, the TOUT
signal is output from the output port terminal R02 and when "0" is written, the terminal goes to a high
(VDD) level. However, the data register R02 must always be "1" and the high impedance control register
R02HIZ must always be "0" (data output state).
At initial reset, this register is set to "0".
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