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參數(shù)資料
| 型號： | S1C6P366D0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4.1 MHz, MICROCONTROLLER, UUC102 |
| 封裝： | DIE-102 |
| 文件頁數(shù)： | 52/84頁 |
| 文件大?。?/td> | 1740K |
| 代理商： | S1C6P366D0A0100 |
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46
EPSON
S1C6P366 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver)
4.7 LCD Driver (COM0–COM3, SEG0–SEG31)
4.7.1 Configuration of LCD driver
The S1C6P366 has 4 common terminals (COM0–COM3) and 32 segment terminals (SEG0–SEG31), so that
it can drive an LCD with a maximum of 128 (32
× 4) segments.
The driving method is 1/4 duty, 1/3 duty or 1/2 duty dynamic drive with four voltages (1/3 bias), VSS,
VC1, VC2 and VC3. It is also possible to set static drive. The drive duty and static drive can be selected by
software.
4.7.2 Power supply for LCD driving
VC1–VC3 are the LCD drive voltages generated by the LCD system voltage circuit.
The LCD system voltage circuit generates VC2 with the voltage regulator incorporated in itself, and
generates two other voltages by boosting or reducing the voltage VC2.
The LCD system voltage circuit that generates VC1–VC3 is turned ON and OFF by the LCD power control
register LPWR.
By setting LPWR to "1", the LCD system voltage circuit generates VC1–VC3. When LPWR is set to "0",
VC1–VC3 becomes VSS level. In this case, all outputs from the COM terminals and SEG terminals go to VSS
level.
To display the LCD, the LCD drive power must be ON by previously setting LPWR to "1".
Furthermore, SEG output ports that are set for DC output operate same as the output (R) port regardless
of the power ON/OFF control.
4.7.3 Control of LCD display and drive waveform
(1) Display ON/OFF control
The S1C6P366 incorporates the ALON and ALOFF registers to blink display. When "1" is written to
ALON, all the segments go ON, and when "1" is written to ALOFF, all the segments go OFF. At such a
time, an ON waveform or an OFF waveform is output from SEG terminals. When "0" is written to
these registers, normal display is performed. Furthermore, when "1" is written to both of the ALON
and ALOFF, ALON (all ON) has priority over the ALOFF (all OFF).
(2) Setting of drive duty
In the S1C6P366, the drive duty can be set to 1/4, 1/3 or 1/2 by the software. This setting is done
using the LDUTY1 and LDUTY0 registers as shown in Table 4.7.3.1.
Table 4.7.3.1 LCD drive duty setting
LDUTY1
1
0
LDUTY0
1
0
Drive duty
1/2
1/3
1/4
Common terminal used
COM0, COM1
COM0–COM2
COM0–COM3
Maximum segment number
64 (32
× 2)
96 (32
× 3)
128 (32
× 4)
Frame frequency
32 Hz
42.7 Hz
32 Hz
When fOSC1 = 32.768 kHz
Figures 4.7.3.1 to 4.7.3.3 show the dynamic drive waveform according to the drive duty.
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