參數(shù)資料
型號: S1C621A0F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 68/161頁
文件大?。?/td> 1037K
代理商: S1C621A0F0A0100
160
32000D–04/2011
AVR32
CPC – Compare with Carry
Architecture revision:
Architecture revision1 and higher.
Description
Performs a compare between the two registers specified. The operation is executed by doing a
subtraction with carry (as borrow) without writeback of the difference. The operation sets the sta-
tus flags according to the result of the subtraction, but does not affect the operand registers.
Note that the zero flag status before the operation is included in the calculation of the new zero
flag. This instruction allows large compares (64, 128 or more bits).
Operation:
I.
Rd - Rs - C;
II.
Rd - C;
Syntax:
I.
cpc
Rd, Rs
II.
cpc
Rd
Operands:
I.
{d, s}
∈ {0, 1, …, 15}
II.
d
∈ {0, 1, …, 15}
Status Flags:
In format II, Rs referred to below equals zero.
Q:
Not affected
V:
V
← (Rd[31] ∧ Rs[31] ∧ RES[31]) ∨ (Rd[31] ∧ Rs[31] ∧ RES[31])
N:
N
← RES[31]
Z:
Z
← (RES[31:0] == 0) ∧ Z
C:
C
← Rd[31] ∧ Rs[31] ∨ Rs[31] ∧ RES[31] ∨ Rd[31] ∧ RES[31]
Opcode:
Format I:
Format II:
111
Rs
00000
Rd
31
29
28
25
24
20
19
16
0001001100000000
15
12
11
8
7
0
010111000010
Rd
15
13
12
9
8
4
3
0
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