參數(shù)資料
型號: S1C621A0F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 124/161頁
文件大?。?/td> 1037K
代理商: S1C621A0F0A0100
I-40
EPSON
S1C621A0 TECHNICAL HARDWARE
CHAPTER 3: PERIPHERAL CIRCUITS (Remote LED Control)
With REM ON/OFF operations under soft-timer mode, the
CPU is forced to devote the greater part of its time to them
so that it has no flexibility for execution of other routines. To
alleviate this problem, the S1C621A0 supports hardware
REM control mode.
In the hard-timer mode, hardware automatically generates
REM according to the REMOUT time
tRO (REM-ON time) and
REM interrupt time
tRI which are defined by software. The
hardware uses a REM interrupt to inform the timer that
transmission of one bit is completed.
While the REM circuit is ON, the software timer sets the
next REMOUT time. This assures that REM can be output in
stable cycles. (See Figure 3.9.5.)
Hard-timer mode
Fig. 3.9.5
Timing Chart of REM Output
(Hard-timer Mode)
Figure 3.9.6 shows a block diagram of the REM circuit used
under hard-timer mode.
tRO
tRI
Write data
to register
τ-waveform
REMOUT
REM (pin)
REM interrupt
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