參數(shù)資料
型號: S1C621A0F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 136/161頁
文件大?。?/td> 1037K
代理商: S1C621A0F0A0100
S1C621A0 TECHNICAL HARDWARE
EPSON
I-51
CHAPTER 3: PERIPHERAL CIRCUITS (Interrupt and Halt)
3.11 Interrupt and Halt
The S1C621A0 has a total of six interrupt functions: two
external input interrupts, three internal timer interrupts,
and one remote control (REM) interrupt. Each of them can
be masked. To enable an interrupt, the interrupt flag must
be enabled (set to 1). Upon occurrence of an interrupt, the
flag is disabled (set to 0).
When an interrupt occurs, the count of the next program to
execute is saved into the stack (RAM) and the program
counter is set to the interrupt vector (page 1, steps 01H to
0FH) depending on the interrupt factor. (These processes
require a time of 12 clocks.) All subsequent processing is
controlled by the software written in the interrupt vector.
Execution of the HALT instruction stops the CPU clock of
the S1C621A0 to halt the CPU. An interrupt enables it to
restart from the halt state. If the CPU can not restart, be-
cause dose not detect an interrupt, it restarts from initial
reset state under watchdog timer control.
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