參數(shù)資料
型號: S1C621A0F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 64/161頁
文件大?。?/td> 1037K
代理商: S1C621A0F0A0100
157
32000D–04/2011
AVR32
CP.H – Compare Halfword
Architecture revision:
Architecture revision1 and higher.
Description
Performs a compare between the lowermost halfwords in the two operands specified. The oper-
ation is implemented by doing a subtraction without writeback of the difference. The operation
sets the status flags according to the result of the subtraction, but does not affect the operand
registers.
Operation:
I.
Rd[15:0] - Rs[15:0];
Syntax:
I.
cp.h
Rd, Rs
Operands:
I.
{d, s}
∈ {0, 1, …, 15}
Status Flags:
Format I: OP1 = Rd, OP2 = Rs
Q:
Not affected
V:
V
← (OP1[15] ∧ OP2[15] ∧ RES[15]) ∨ (OP1[15] ∧ OP2[15] ∧ RES[15])
N:
N
← RES[15]
Z:
Z
← (RES[15:0] == 0)
C:
C
← OP1[15] ∧ OP2[15] ∨ OP2[15] ∧ RES[15] ∨ OP1[15] ∧ RES[15]
Opcode
111
Rs
00000
Rd
31
29
28
25
24
20
19
16
0001100100000000
15
12
11
8
7
0
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