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參數(shù)資料
| 型號(hào)： | S1C621A0F0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁(yè)數(shù)： | 131/161頁(yè) |
| 文件大?。?/td> | 1037K |
| 代理商： | S1C621A0F0A0100 |
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S1C621A0 TECHNICAL HARDWARE
EPSON
I-47
CHAPTER 3: PERIPHERAL CIRCUITS (Remote LED Control)
REM circuit
programming notes
In programming the REM circuit, the following precautions
should be observed:
(1) After initial reset, the REMC register stays at 1 to initial-
ize the carrier generation circuit. The REMC register can
only be reset to 0 after initialization (at least 32 machine
cycles later).
(2) The REM circuit does not stop immediately after the
REMC register is reset to 0. It stops synchronously with
the interval
τ, during which OSC3 must be held ON.
(3) With the REM circuit in operation, do not write data at
addresses 0F8H and 0F9H (REM interrupt counter and
REMOUT time setting register) during an interval of one
carrier before and after the rise of
τ.
(4) With the REM circuit in operation, do not write data at
addresses 0F7H (
τ-setting register).
(5) During the operation under hard-timer mode, the
REMSO register must be fixed at 0.
(6) Read the IREM (REM interrupt factor flag) in DI status
(interrupt flag = 0). Reading of interrupt factor flags is
available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the
interrupt factor flags to be read is set to 1, an interrupt
request will be generated by the interrupt factor flags set
timing, or an interrupt request will not be generated. Be
very careful when interrupt factor flags are in the same
address.
(7) If the RIC register is set again before a REM interrupt
occurs with the RIC register set, an invalid interrupt
may occur.
(8) The values that can be set in the REM interrupt counter
(0F8H) are from 0 to 0EH. Remember, writing 0FH into
the counter may cause an error.
(9) Soft-timer mode cannot coexist with hard-timer mode.
To use them in combination, stop the REM circuit before
selecting either.
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