參數(shù)資料
型號(hào)： PNX8511
廠商： NXP Semiconductors N.V.
英文描述： Analog companion chip
中文描述： 模擬伴隨芯片
文件頁(yè)數(shù)： 84/92頁(yè)
文件大?。?/td> 3064K
代理商： PNX8511
Philips Semiconductors
PNX8510/11
Analog companion chip
Product data
Rev. 04 – 12 January 2004
84 of 92
9397 750 12612
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
10.3.2
Sleep and power down modes
Sleep mode occurs when all current output switches are disabled asynchronously so
that no current flows in either Iout or Idump pins i.e., IOUT = IDUMP = 0. Sleep mode
allows a rapid recovery from a low power consumption state. Each DAC can be put
into sleep mode asynchronously where IOUT = IDUMP = 0, yet still supply current
flows to power the bandgap, opmap, and other analog DAC components, including
the digital logic.
Powerdown mode occurs when each DAC can be asynchronously put into zero state
current so that all current output switches are disabled. This includes current to all
analog and digital components of the DAC such as bandgap reference, opmaps, etc.
In this mode IDDD = IDDA = 0.
10.4 Device initialization
The PNX8510/11 must be synchronously reset by providing a video clock to both
clock inputs (DV_CLK1 and DV_CLK2) before the reset line (RESET_N) is pulled
high. This will ensure correct initialization. Failure to follow this sequence may result
in no video output from the PNX8510/11, or similar symptoms.
The I
2
C bus of the PNX8510/11 is disabled during the reset of the device and the
I2C_SDA pin is only released after the reset sequence is complete. This release
requires that an audio clock is applied to the I2S_AOS1_CLK, in addition to the video
clock applied to DV_CLK1. Therefore, even in applications which do not make use of
the audio functionality of the PNX8510/11, it is still necessary to apply a clock to
I2S_AOS1_CLK.
RSsetnom = 1 k
for RL = 37.5
(double termination) RSetmax = 2 k
for RL = 75
ICOMPn = reference currents for up to 6 DACs.
IOUT + IDUMP = 1023I1 = constant, IDUMP = (1023 - D) I1, VDUMP = IOUT x RL, VOUT =
IOUT x RL.
VOUTmin = 15.57 mA x 37.5
= 0.584 V (full-scale, fine adjust = 0%)
VOUTmin = 32.80 mA x 37.5
= 1230 V (full-scale, fine adjust = 0%)
Fig 34. Video channel DAC programming
MDB662
6
PCOMP
PCOMP
ICOMP1
DAC10
COMP
VSSA
VSSA
VSSA
VSSA
RO = 2 x 75
RL = RO / 2
RDUMP =
0.1 or 2
separate output level coarse adjust for each DAC
Iref
M =
7 to
+
7
4-bit
fine
adjust
N = 0 to 31
5-bit
coarse
adjust
D = 0 to 1023
10-bit
digital
inputs
10-bit current DAC with programmable output level
adjustments of fine and coarse
IOUT
IDUMP
IOUT
RS
------------
100
---------
×
1
--------------------
100
100
--------
+
×
23
16
×
-----------------
×
D
×
=
I1
LSBcurrent
=
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