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參數(shù)資料
| 型號(hào)： | PNX8511 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Analog companion chip |
| 中文描述： | 模擬伴隨芯片 |
| 文件頁數(shù)： | 24/92頁 |
| 文件大?。?/td> | 3064K |
| 代理商： | PNX8511 |
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Philips Semiconductors
PNX8510/11
Analog companion chip
Product data
Rev. 04 – 12 January 2004
24 of 92
9397 750 12612
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.2.1
HD-sync generator module
This section describes the operation and programming of the high definition (HD)
video data path sync unit.
The module’s purpose is to provide the video data path that bypasses the digital
video encoders with the appropriate synchronization pattern. The module design
provides maximum flexibility in terms of raster generation for all interlaced and
non-interlaced ATSC formats. The sync engine is capable of providing a combination
of event-value pairs which can be used to insert certain values at specified times in
the outgoing data stream. It can also be used to generate digital signals associated
with time events. They can be used as digital Horizontal and Vertical synchronization
signals.
The sync raster generation is fully programmable to accommodate different
requirements. The raster generation can be either progressive or interlaced. Digital
sync signal generation (Horizontal, Vertical and Blank) as well as analog embedded
sync generation are supported. The picture position is adjustable through the
programmable relation between the sync pulses and the video contents.
The generation of embedded analog sync pulses is bound to a number of events
which can be defined for a line. Several of these line-timing definitions can exist in
parallel. For the final sync raster composition a certain sequence of lines with
different sync event properties has to be defined. The sequence specifies a series of
line types and the number of occurrences of this specific line type.
After the sequence has completed, it restarts from the beginning. In this way, the sync
raster generation is generic and can be adopted to different standards (different sync
shapes, various H-timing, interlaced, progressive...). However, to generate a stable
picture, it is important that the sequence fits precisely to the incoming data stream in
terms of the total number of pixels per frame.
The sync engine’s flexibility is achieved by using a sequence of linked lists carrying
the properties for the image, the lines as well as fractions of lines. The list
dependencies are illustrated in
Figure 22
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PNX8511HW/B1 | 功能描述:視頻 IC ANALOG BACKEND COMPANION RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| PNX8511HW/B1,557 | 功能描述:視頻 IC ANALOG BACKEND RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| PNX8526 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Programmable source decoder with integrated peripherals |
| PNX8526EH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Programmable source decoder with integrated peripherals |
| PNX8932E/M101S5 LP | 制造商:Entropic 功能描述:IC |
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