- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382396 > PNX8511 (NXP Semiconductors N.V.) Analog companion chip PDF資料下載
參數(shù)資料
| 型號(hào)： | PNX8511 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Analog companion chip |
| 中文描述： | 模擬伴隨芯片 |
| 文件頁數(shù)： | 10/92頁 |
| 文件大?。?/td> | 3064K |
| 代理商： | PNX8511 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
Philips Semiconductors
PNX8510/11
Analog companion chip
Product data
Rev. 04 – 12 January 2004
10 of 92
9397 750 12612
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
If the interface is operated in D1 mode, the data stream presented to the interface has
to be D1 compliant i.e., the maximum and minimum codes (8-bit 0x00 0xFF, 10-bit
0x000 0x3FF) must not occur during active video.
A detailed description of video input data formats can be found in
Section 7.1.2
. The
video modes listed correspond to the settings of the DEMUX_MODE bits in the
register 0x95 VMUXCTL
Section 8.1
. If the video interface clock frequency is not
equivalent to the processing and the video DAC operation frequency the appropriate
divider registers in the audio/clock register section have to be programmed. As a
general rule the settings in
Table 10
should be used:
7.1.2
Video input modes
The PNX8510/11 video interface supports a wide variety of video formats. The video
interface is designed in a generic fashion. It is de-coupled from the actual video data
paths in the system and imposes only a few restrictions on the video data streams
provided to the chip.
This section explains the possible video stream formats and provides details on
synchronizing the PNX8510/11 with respect to a particular video data format.
The PNX8510/11 accepts the video formats shown in
Figure 4
to
Figure 10
on a
single interface with up to 81 MHz interface clock:
YUV 4:2:2
This is the CCIR-656 compliant format and will mainly be used at an interface speed
of 27 MHz to feed the video encoder modules in the chip.
This is the standard interface format for the secondary video encoder pipeline unless
the chip is used in High Definition (HD) mode.
The YUV 4:2:2 format can also be used to feed the HD data path as long as the pixel
clock rate stays below 81 MHz. To operate the HD data path with 4:2:2 source
material the 4:2:2 to 4:4:4 filter should be enabled to achieve the best video quality.
Table 10:
Mode
Clock frequency settings
Interface
clock
27 MHz
81 MHz
74.25 MHz
Processing
clock
27 MHz
27 MHz
74.25 MHz
DAC clock
4:2:2 YUV SD Single Interface Mode
4:4:4 RGB 2FH Single Interface Mode
4:2:2 YUV 1080i Double Interface Mode
27 MHz
27 MHz
74.25 MHz
Fig 4.
YUV 4:2:2
MDB638
FF
00
00 EAV 80
10
80
10
FF
00
00 SAV U1
Y1
V1
Y2
U3
Y3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PNX8526 | Programmable source decoder with integrated peripherals |
| PNX8526EH | Programmable source decoder with integrated peripherals |
| PPC5001T | NPN microwave power transistor |
| PRLL4001 | Rectifiers |
| PRLL4002 | Rectifiers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PNX8511HW/B1 | 功能描述:視頻 IC ANALOG BACKEND COMPANION RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| PNX8511HW/B1,557 | 功能描述:視頻 IC ANALOG BACKEND RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| PNX8526 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Programmable source decoder with integrated peripherals |
| PNX8526EH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Programmable source decoder with integrated peripherals |
| PNX8932E/M101S5 LP | 制造商:Entropic 功能描述:IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。