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參數(shù)資料
| 型號： | PNX8511 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Analog companion chip |
| 中文描述： | 模擬伴隨芯片 |
| 文件頁數(shù)： | 46/92頁 |
| 文件大?。?/td> | 3064K |
| 代理商： | PNX8511 |
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Philips Semiconductors
PNX8510/11
Analog companion chip
Product data
Rev. 04 – 12 January 2004
46 of 92
9397 750 12612
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
6
CVBSEN
R/W
1
DAC1 control
0 = Video dac 1carries the luminance channel.
1 = Video dac 1 carries the CVBS channel.
DAC2 control
0 = Video dac 2 carries the red channel.
1 = Video dac 2 carries the chroma channel.
5
CEN*
R/W
1
4:0
Registers 0x2E– 0x37 must be initialized to zero.
Offset 0x38 - GAIN_Y *
7:5
Unused
4:0
GAIN_Y*
Unused
-
-
0x1A
R/W
Gain adjust for Y component in SD-RGB/YUV data path, two’s
complement number to adjust the gain from -50% to +50%
Yout=Yin x (1+ GAIN_Y/32)
Offset 0x39 - GAIN_UV*
7:5
Unused
4:0
GAIN_UV*
-
0x1A
R/W
Gain adjust for U/V components in SD-RGB/YUV data path, two’s
complement number to adjust the gain from -50% to +50%
UVout=UVin x (1+ GAIN_UV/32)
Offset 0x3A - INPCTL
7
CBENB
R/W
0
Color bar generator
0 = Color bar generation switched off
1 = Color bar generation enabled (SD-CVBS/YC and SD-RGB/YUV
modes only)
0 = Leave the pixel qualifier untouched.
1 = Invert the incoming pixel qualifier.
Use qualifier enable
0 = No qualifier is used, QUALINVERT should be set.
1 = The HSYNC input is used as slice qualifier in interleaved mode.
Double edge mode
0 = Double edge mode off; either the interface is running at 2x
speed to get interleaved data in or only non-interleaved data
streams are accepted.
1 = Input data is latched at positive and negative edge. The
SLICE_DIR register determines which data slice goes in which
channel.
Video mode switch
0 = HD data path in operation; encoder runs idle.
1 = SD data path in operation; encoder is in CVBS/YC or RGB
mode.
0 = Y/R data channel coming from the D1 interface left unchanged
1 = Y/R MSB of data coming from the D1 interface is inverted.
0 = U/G data channel coming from the D1 interface left unchanged
1 = U/G MSB of data coming from the D1 interface is inverted.
6
QUALINVERT*
R/W
1
5
USE_QUAL*
R/W
0
4
DEDGE
R/W
0
3
SD_HD*
R/W
1
2
U2C
R/W
1
1
M2C
R/W
1
Table 29:
* indicates not present in secondary video channel
Bit
Symbol
PNX8510/11 video registers
…continued
Access Value
Description
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PNX8511HW/B1 | 功能描述:視頻 IC ANALOG BACKEND COMPANION RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| PNX8511HW/B1,557 | 功能描述:視頻 IC ANALOG BACKEND RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| PNX8526 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Programmable source decoder with integrated peripherals |
| PNX8526EH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Programmable source decoder with integrated peripherals |
| PNX8932E/M101S5 LP | 制造商:Entropic 功能描述:IC |
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