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參數(shù)資料
| 型號： | PIC12F505 |
| 廠商： | Microchip Technology Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8/14-Pin, 8-Bit Flash Microcontrollers |
| 中文描述： | 8/14-Pin，8位閃存微控制器 |
| 文件頁數(shù)： | 61/100頁 |
| 文件大?。?/td> | 741K |
| 代理商： | PIC12F505 |
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2007 Microchip Technology Inc.
Preliminary
DS41236C-page 59
PIC12F508/509/16F505
DECF
Syntax:
Operands:
Decrement f
[
label
] DECF f,d
0
≤
f
≤
31
d
∈
[0,1]
(f) – 1
→
(dest)
Z
Decrement register ‘f’. If ‘d’ is ‘
0
’,
the result is stored in the W
register. If ‘d’ is ‘
1
’, the result is
stored back in register ‘f’.
Operation:
Status Affected:
Description:
DECFSZ
Syntax:
Operands:
Decrement f, Skip if 0
[
label
] DECFSZ f,d
0
≤
f
≤
31
d
∈
[0,1]
(f) – 1
→
d; skip if result =
0
None
The contents of register ‘f’ are
decremented. If ‘d’ is ‘
0
’, the result
is placed in the W register. If ‘d’ is
‘
1
’, the result is placed back in
register ‘f’.
If the result is ‘
0
’, the next instruc-
tion, which is already fetched, is
discarded and a
NOP
is executed
instead making it a two-cycle
instruction.
Operation:
Status Affected:
Description:
GOTO
Syntax:
Operands:
Operation:
Unconditional Branch
[
label
] GOTO k
0
≤
k
≤
511
k
→
PC<8:0>;
STATUS<6:5>
→
PC<10:9>
None
GOTO
is an unconditional branch.
The 9-bit immediate value is
loaded into PC bits <8:0>. The
upper bits of PC are loaded from
STATUS<6:5>.
GOTO
is a two-
cycle instruction.
Status Affected:
Description:
INCF
Syntax:
Operands:
Increment f
[
label
] INCF f,d
0
≤
f
≤
31
d
∈
[0,1]
(f) + 1
→
(dest)
Z
The contents of register ‘f’ are
incremented. If ‘d’ is ‘
0
’, the result
is placed in the W register. If ‘d’ is
‘
1
’, the result is placed back in
register ‘f’.
Operation:
Status Affected:
Description:
INCFSZ
Syntax:
Operands:
Increment f, Skip if 0
[
label
] INCFSZ f,d
0
≤
f
≤
31
d
∈
[0,1]
(f) + 1
→
(dest), skip if result =
0
None
The contents of register ‘f’ are
incremented. If ‘d’ is ‘
0
’, the result
is placed in the W register. If ‘d’ is
‘
1
’, the result is placed back in
register ‘f’.
If the result is ‘
0
’, then the next
instruction, which is already
fetched, is discarded and a
NOP
is
executed instead making it a
two-cycle instruction.
Operation:
Status Affected:
Description:
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Inclusive OR literal with W
[
label
] IORLW k
0
≤
k
≤
255
(W) .OR. (k)
→
(W)
Z
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the
W register.
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