參數(shù)資料
型號(hào)： PIC12F505
廠商： Microchip Technology Inc.
元件分類： 8位微控制器
英文描述： 8/14-Pin, 8-Bit Flash Microcontrollers
中文描述： 8/14-Pin，8位閃存微控制器
文件頁(yè)數(shù)： 27/100頁(yè)
文件大?。?/td> 741K
代理商： PIC12F505
2007 Microchip Technology Inc.
Preliminary
DS41236C-page 25
PIC12F508/509/16F505
4.7
Program Counter
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next
program instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
For a
GOTO
instruction, bits 8:0 of the PC are provided
by the
GOTO
instruction word. The Program Counter
(PCL) is mapped to PC<7:0>. Bit 5 of the STATUS
register provides page information to bit 9 of the PC
(Figure 4-6).
For a
CALL
instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are
provided by the instruction word. However, PC<8>
does not come from the instruction word, but is always
cleared (Figure 4-6).
Instructions where the PCL is the destination, or modify
PCL instructions, include
MOVWF PC, ADDWF PC
and
BSF PC,5.
FIGURE 4-6:
LOADING OF PC
BRANCH INSTRUCTIONS
4.7.1
EFFECTS OF RESET
The PC is set upon a Reset, which means that the PC
addresses the last location in the last page (i.e., the
oscillator calibration instruction). After executing
MOVLW XX
, the PC will roll over to location 00h and
begin executing user code.
The STATUS register page preselect bits are cleared
upon a Reset, which means that page 0 is pre-selected.
Therefore, upon a Reset, a
GOTO
instruction will
automatically cause the program to jump to page 0 until
the value of the page bits is altered.
4.8
Stack
The PIC12F508/509/16F505 devices have a 2-deep,
12-bit wide hardware PUSH/POP stack.
A
CALL
instruction will PUSH the current value of Stack 1
into Stack 2 and then PUSH the current PC value, incre-
mented by one, into Stack Level 1. If more than two
sequential
CALL
s are executed, only the most recent two
return addresses are stored.
A
RETLW
instruction will POP the contents of Stack
Level 1 into the PC and then copy Stack Level 2
contents into Stack Level 1. If more than two sequential
RETLW
s are executed, the stack will be filled with the
address previously stored in Stack Level 2. Note that
the W register will be loaded with the literal value
specified in the instruction. This is particularly useful for
the implementation of data look-up tables within the
program memory.
Note:
Because PC<8> is cleared in the
CALL
instruction or any modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any
program memory page (512 words long).
PA0
Status
PC
8 7
0
PCL
9
10
Instruction Word
7
0
GOTO
Instruction
CALL
or Modify PCL Instruction
11
PA0
Status
PC
8 7
0
PCL
9
10
Instruction Word
Reset to ‘
0
’
7
0
11
Note 1:
There are no Status bits to indicate stack
overflows or stack underflow conditions.
2:
There are no instruction mnemonics
called PUSH or POP. These are actions
that occur from the execution of the
CALL
and
RETLW
instructions.
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