參數(shù)資料
型號(hào): PIC12C67X
廠商: Microchip Technology Inc.
英文描述: 8-Pin, 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory
中文描述: 8引腳,8位CMOS微控制器與A / D轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲(chǔ)器
文件頁數(shù): 106/129頁
文件大?。?/td> 931K
代理商: PIC12C67X
PIC12C67X
DS30561B-page 106
1999 Microchip Technology Inc.
FIGURE 12-9: A/D CONVERSION TIMING
TABLE 12-8:
A/D CONVERSION REQUIREMENTS
Param
No.
130
Sym
Characteristic
Min
Typ
Max
Units
Conditions
T
AD
A/D clock period
PIC12
C
67X
PIC12
LC
67X
PIC12
C
67X
PIC12
LC
67X
1.6
2.0
2.0
3.0
11
4.0
6.0
6.0
9.0
11
μ
s
μ
s
μ
s
μ
s
T
AD
T
OSC
based, V
REF
3.0V
T
OSC
based, V
REF
full range
A/D RC Mode
A/D RC Mode
131
T
CNV
Conversion time (not including S/H
time) (Note 1)
Acquisition time
132
T
ACQ
Note 2
5*
20
μ
s
μ
s
The minimum time is the
amplifier setting time. This
may be used if the "new"
input voltage has not
changed by more than 1 LSb
(i.e., 20.0 mV @ 5.12V) from
the last sampled voltage (as
stated on C
HOLD
).
If the A/D clock source is
selected as RC, a time of
T
CY
is added before the A/D
clock starts. This allows the
SLEEP
instruction to be exe-
cuted.
134
T
GO
Q4 to A/D clock start
T
OSC
/2 §
135
T
SWC
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25
°
C unless otherwise stated. These parameters are for design guidance only and
are not tested.
§
This specification ensured by design.
Note 1:
ADRES register may be read on the following T
CY
cycle.
2:
See Section 8.1 for min. conditions.
Switching from convert
sample time
1.5 §
T
AD
*
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
DONE
NEW_DATA
(T
OSC
/2)
(1)
7
6
5
4
3
2
1
0
Note 1:
If the A/D clock source is selected as RC, a time of T
CY
is added before the A/D clock starts. This allows the
SLEEP
instruction to be executed.
1 T
CY
134
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