TM Family Datasheet Page 7 of 77 July 2009 – Revi" />
參數(shù)資料
型號(hào)： PI7C9X20404SLCFDE
廠商： Pericom
文件頁數(shù)： 67/77頁
文件大?。?/td> 0K
描述： IC PCIE PACKET SWITCH 128LQFP
標(biāo)準(zhǔn)包裝： 90
系列： SlimLine™
應(yīng)用： 封裝開關(guān)，4 端口/4 線道
接口： PCI Express
封裝/外殼： 128-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 128-LQFP（14x14）
包裝： 托盤
安裝類型： 表面貼裝
PI7C9X20404SL
4Port-4Lane PCI Express Switch
SlimLine
TM Family
Datasheet
Page 7 of 77
July 2009 – Revision 1.2
Pericom Semiconductor
7.2.61
EEPROM CONTROL REGISTER – OFFSET DCh (Upstream Port Only)........................................ 49
7.2.62
EEPROM ADDRESS REGISTER – OFFSET DCh (Upstream Port Only)......................................... 50
7.2.63
EEPROM DATA REGISTER – OFFSET DCh (Upstream Port Only)................................................ 50
7.2.64
PCI EXPRESS CAPABILITY ID REGISTER – OFFSET E0h ............................................................ 50
7.2.65
NEXT ITEM POINTER REGISTER – OFFSET E0h .......................................................................... 50
7.2.66
PCI EXPRESS CAPABILITIES REGISTER – OFFSET E0h .............................................................. 50
7.2.67
DEVICE CAPABILITIES REGISTER – OFFSET E4h ....................................................................... 51
7.2.68
DEVICE CONTROL REGISTER – OFFSET E8h............................................................................... 52
7.2.69
DEVICE STATUS REGISTER – OFFSET E8h................................................................................... 52
7.2.70
LINK CAPABILITIES REGISTER – OFFSET ECh ............................................................................ 53
7.2.71
LINK CONTROL REGISTER – OFFSET F0h.................................................................................... 54
7.2.72
LINK STATUS REGISTER – OFFSET F0h ........................................................................................ 54
7.2.73
SLOT CAPABILITIES REGISTER (Downstream Port Only) – OFFSET F4h ................................... 55
7.2.74
SLOT CONTROL REGISTER (Downstream Port Only) – OFFSET F8h........................................... 56
7.2.75
SLOT STATUS REGISTER (Downstream Port Only) – OFFSET F8h ............................................... 57
7.2.76
PCI EXPRESS ADVANCED ERROR REPORTING CAPABILITY ID REGISTER – OFFSET 100h. 58
7.2.77
CAPABILITY VERSION – OFFSET 100h .......................................................................................... 58
7.2.78
NEXT ITEM POINTER REGISTER – OFFSET 100h......................................................................... 58
7.2.79
UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 104h ................................................. 58
7.2.80
UNCORRECTABLE ERROR MASK REGISTER – OFFSET 108h .................................................... 59
7.2.81
UNCORRECTABLE ERROR SEVERITY REGISTER – OFFSET 10Ch............................................. 60
7.2.82
CORRECTABLE ERROR STATUS REGISTER – OFFSET 110 h...................................................... 60
7.2.83
CORRECTABLE ERROR MASK REGISTER – OFFSET 114 h ......................................................... 61
7.2.84
ADVANCE ERROR CAPABILITIES AND CONTROL REGISTER – OFFSET 118h......................... 61
7.2.85
HEADER LOG REGISTER – OFFSET From 11Ch to 128h .............................................................. 62
7.2.86
PCI EXPRESS VIRTUAL CHANNEL CAPABILITY ID REGISTER – OFFSET 140h (Upstream Only)
62
7.2.87
CAPABILITY VERSION – OFFSET 140h (Upstream Only) .............................................................. 62
7.2.88
NEXT ITEM POINTER REGISTER – OFFSET 140h (Upstream Only)............................................. 62
7.2.89
PORT VC CAPABILITY REGISTER 1 – OFFSET 144h (Upstream Only) ........................................ 62
7.2.90
PORT VC CAPABILITY REGISTER 2 – OFFSET 148h (Upstream Only) ........................................ 63
7.2.91
PORT VC CONTROL REGISTER – OFFSET 14Ch (Upstream Only)............................................... 63
7.2.92
PORT VC STATUS REGISTER – OFFSET 14Ch (Upstream Only)................................................... 63
7.2.93
VC RESOURCE CAPABILITY REGISTER (0) – OFFSET 150h (Upstream Only)............................ 64
7.2.94
VC RESOURCE CONTROL REGISTER (0) – OFFSET 154h (Upstream Only) ............................... 64
7.2.95
VC RESOURCE STATUS REGISTER (0) – OFFSET 158h (Upstream Only).................................... 65
7.2.96
PORT ARBITRATION TABLE REGISTER (0) – OFFSET 180h-1BCh (Upstream Only).................. 65
7.2.97
PCI EXPRESS POWER BUDGETING CAPABILITY ID REGISTER – OFFSET 20Ch .................... 65
7.2.98
CAPABILITY VERSION – OFFSET 20Ch.......................................................................................... 65
7.2.99
NEXT ITEM POINTER REGISTER – OFFSET 20Ch ........................................................................ 66
7.2.100
DATA SELECT REGISTER – OFFSET 210h ................................................................................. 66
7.2.101
POWER BUDGETING DATA REGISTER – OFFSET 214h .......................................................... 66
7.2.102
POWER BUDGET CAPABILITY REGISTER – OFFSET 218h ..................................................... 67
8
CLOCK SCHEME .............................................................................................................................................68
9
IEEE 1149.1 COMPATIBLE JTAG CONTROLLER....................................................................................69
9.1
INSTRUCTION REGISTER ......................................................................................................................69
9.2
BYPASS REGISTER .................................................................................................................................69
9.3
DEVICE ID REGISTER.............................................................................................................................69
9.4
BOUNDARY SCAN REGISTER...............................................................................................................70
9.5
JTAG BOUNDARY SCAN REGISTER ORDER......................................................................................70
10 POWER MANAGEMENT ................................................................................................................................72
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參數(shù)描述
PI7C9X20404SLCFDEX 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 4port 4lane PCIe Packet Switch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20505GPBNDE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 5port 5lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20508GPANDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube
PI7C9X20508GPBEVB 制造商:Pericom Semiconductor Corporation 功能描述:EVAL BOARD - Boxed Product (Development Kits)
PI7C9X20508GPBNDE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 5port 8lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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