參數(shù)資料
| 型號： | PI7C9X20404SLCFDE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 47/77頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCIE PACKET SWITCH 128LQFP |
| 標準包裝： | 90 |
| 系列： | SlimLine™ |
| 應用： | 封裝開關，4 端口/4 線道 |
| 接口： | PCI Express |
| 封裝/外殼： | 128-LQFP 裸露焊盤 |
| 供應商設備封裝： | 128-LQFP（14x14） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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PI7C9X20404SL
4Port-4Lane PCI Express Switch
SlimLine
TM Family
Datasheet
Page 51 of 77
July 2009 – Revision 1.2
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
23:20
Device/Port Type
RO
Indicates the type of PCI Express logical device.
Reset to 0101b (Upstream port).
Reset to 0110b (Downstream port).
24
Slot Implemented
HwInt
When set, indicates that the PCIe Link associated with this Port is connected
to a slot. This field is valid for downstream port of the Switch. The default
value may be changed by the status of strapped pin, SMBUs, or auto-loading
from EEPROM.
29:25
Interrupt Message
Number
RO
Read as 0b. No MSI messages are generated in the transparent mode.
31:30
Reserved
RO
Reset to 00b.
7.2.67
DEVICE CAPABILITIES REGISTER – OFFSET E4h
BIT
FUNCTION
TYPE
DESCRIPTION
2:0
Max_Payload_Size
Supported
RO
Indicates the maximum payload size that the device can support for TLPs.
Each port of the Switch supports 256 bytes max payload size. The default
value may be changed by SMBus or auto-loading from EEPROM.
Reset to 001b.
4:3
Phantom Functions
Supported
RO
Indicates the support for use of unclaimed function numbers as Phantom
functions. Read as 00b, since the Switch does not act as a requester.
Reset to 00b.
5
Extended Tag Field
Supported
RO
Indicates the maximum supported size of Tag field as a Requester. Read as 0,
since the Switch does not act as a requester.
Reset to 0b.
8:6
Endpoint L0s
Acceptable Latency
RO
Acceptable total latency that an Endpoint can withstand due to the transition
from L0s state to the L0 state. For Switch, the ASPM software would not
check this value.
Reset to 000b.
11:9
Endpoint L1
Acceptable Latency
RO
Acceptable total latency that an Endpoint can withstand due to the transition
from L1 state to the L0 state. For Switch, the ASPM software would not
check this value.
Reset to 000b.
14:12
Reserved
RO
Reset to 000b.
15
Role_Based Error
Reporting
RO
When set, indicates that the device implements the functionality originally
defined in the Error Reporting ECN. The default value may be changed by
SMBus or auto-loading from EEPROM.
Reset to 1b.
17:16
Reserved
RO
Reset to 00b.
25:18
Captured Slot Power
Limit Value
RO
It applies to Upstream Port only. In combination with the Slot Power Limit
Scale value, specifies the upper limit on power supplied by slot.
This value is set by the Set_Slot_Power_Limit message or hardwired to 00h.
Reset to 00h.
27:26
Captured Slot Power
Limit Scale
RO
It applies to Upstream Port only. Specifies the scale used for the Slot Power
Limit Value.
This value is set by the Set_Slot_Power_Limit message or hardwired to 00b.
Reset to 00b.
31:28
Reserved
RO
Reset to 0h.
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| PI7C9X20404SLCFDEX | 功能描述:外圍驅動器與原件 - PCI 4port 4lane PCIe Packet Switch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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