參數(shù)資料
| 型號： | PI7C9X20404GPBNBE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 60/79頁 |
| 文件大小： | 0K |
| 描述： | IC PCIE PACKET SWITCH 148LFBGA |
| 產品變化通告： | Product Discontinuation Notice 22/Jan/2010 |
| 標準包裝： | 189 |
| 系列： | GreenPacket™ |
| 應用： | 封裝開關，4 端口/4 線道 |
| 接口： | PCI Express |
| 封裝/外殼： | 148-LFBGA |
| 供應商設備封裝： | 148-LFBGA（12x12） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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PI7C9X20404GP
4Port-4Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 63 of 79
June 2009 – Revision 1.6
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
15:8
Reserved
RO
Reset to 00h.
16
Load Port Arbitration
Table
RW
When set, the programmed Port Arbitration Table is applied to the hardware.
This bit always returns 0b when read.
Reset to 0b.
19:17
Port Arbitration
Select
RW
This field is used to configure the Port Arbitration by selecting one of the
supported Port Arbitration schemes. The permissible values for the schemes
supported by Switch are 000b and 011b at VC0, other value than these
written into this register will be treated as default.
Reset to 000b.
23:20
Reserved
RO
Reset to 0h.
26:24
VC ID
RW
This field assigns a VC ID to the VC resource.
Reset to 000b.
30:27
Reserved
RO
Reset to 0h.
31
VC Enable
RW
0b: it disables this Virtual Channel
1b: it enables this Virtual Channel
Reset to 1b.
7.2.93
VC RESOURCE STATUS REGISTER (0) – OFFSET 158h
BIT
FUNCTION
TYPE
DESCRIPTION
15:0
Reserved
RO
Reset to 0000h.
16
Port Arbitration
Table Status
RO
When set, it indicates that any entry of the Port Arbitration Table is written by
software. This bit is cleared when hardware finishes loading values stored in
the Port Arbitration Table after the bit of “Load Port Arbitration Table” is set.
Reset to 0b.
17
VC Negotiation
Pending
RO
When set, it indicates that the VC resource is still in the process of
negotiation. This bit is cleared after the VC negotiation is complete.
Reset to 0b.
31:18
Reserved
RO
Reset to 0.
7.2.94
VC RESOURCE CAPABILITY REGISTER (1) – OFFSET 15Ch
BIT
FUNCTION
TYPE
DESCRIPTION
7:0
Port Arbitration
Capability
RO
It indicates the types of Port Arbitration supported by the VC resource. The
Switch supports Hardware fixed arbitration scheme, e.g., Round Robin,
Weight Round Robin (WRR) arbitration with 128 phases (3~4 enabled ports)
and Time-based WRR with 128 phases (3~4 enabled ports). Note that the
Time-based WRR is only valid in VC1.
Reset to 00011001b.
13:8
Reserved
RO
Reset to 000000b.
14
Advanced Packet
Switching
RO
When set, it indicates the VC resource only supports transaction optimized
for Advanced Packet Switching (AS).
Reset to 0b.
15
Reject Snoop
Transactions
RO
This bit is not applied to PCIe Switch.
Reset to 0b.
22:16
Maximum Time
Slots
RO
It indicates the maximum numbers of time slots (minus one) are allocated for
Isochronous traffic. The default value may be changed by SMBus or auto-
loading from EEPROM.
Reset to 7Fh.
23
Reserved
RO
Reset to 0b.
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