TM Family Datasheet Page 53 of 79 June 2009 – " />
參數(shù)資料
型號： PI7C9X20404GPBNBE
廠商： Pericom
文件頁數(shù)： 49/79頁
文件大?。?/td> 0K
描述： IC PCIE PACKET SWITCH 148LFBGA
產(chǎn)品變化通告： Product Discontinuation Notice 22/Jan/2010
標(biāo)準(zhǔn)包裝： 189
系列： GreenPacket™
應(yīng)用： 封裝開關(guān)，4 端口/4 線道
接口： PCI Express
封裝/外殼： 148-LFBGA
供應(yīng)商設(shè)備封裝： 148-LFBGA（12x12）
包裝： 托盤
安裝類型： 表面貼裝
PI7C9X20404GP
4Port-4Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 53 of 79
June 2009 – Revision 1.6
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
7
Extended Synch
RW
When set, it transmits 4096 FTS ordered sets in the L0s state for entering L0
state and transmits 1024 TS1 ordered sets in the L1 state for entering L0 state.
Reset to 0b.
15:8
Reserved
RO
Reset to 00h.
7.2.70
LINK STATUS REGISTER – OFFSET F0h
BIT
FUNCTION
TYPE
DESCRIPTION
19:16
Link Speed
RO
Read as 0001b to indicate the negotiated speed of the Express link is 2.5
Gb/s.
25:20
Negotiated Link
Width
RO
Indicates the negotiated width of the given PCIe link.
Reset to 000001b (x1).
26
Training Error
RO
When set, indicates a Link training error occurred.
This bit is cleared by hardware upon successful training of the link to the L0
link state.
Reset to 0b.
27
Link Training
RO
When set, indicates the link training is in progress. Hardware clears this bit
once link training is complete.
Reset to 0b.
28
Slot Clock
Configuration
HwInt
0b: the Switch uses an independent clock irrespective of the presence of a
reference on the connector
1b: the Switch uses the same reference clock that the platform provides on the
connector
The default value may be changed by the status of strapped pin, SMBus, or
auto-loading from EEPROM.
Reset to 0b.
29
Data Link Layer
Link Active
RO
Indicates the status of the Data Link Control and Management State Machine.
It returns a 1b to indicate the DL_Active state, 0b otherwise.
Reset to 0b.
31:30
Reserved
RO
Reset to 00b.
7.2.71
SLOT CAPABILITIES REGISTER (Downstream Port Only) – OFFSET F4h
BIT
FUNCTION
TYPE
DESCRIPTION
0
Attention Button
Present
RO
When set, it indicates that an Attention Button is implemented on the chassis
for this slot. The default value may be changed by SMBus or auto-loading
from EEPROM.
Reset to 0b.
1
Power Controller
Present
RO
When set, it indicates that a Power Controller is implemented for this slot.
The default value may be changed by SMBus or auto-loading from
EEPROM.
Reset to 0b.
2
Reserved
RO
Reset to 0b.
3
Attention Indicator
Present
RO
When set, it indicates that an Attention Indicator is implemented on the
chassis for this slot. The default value may be changed by SMBus or auto-
loading from EEPROM.
Reset to 0b.
相關(guān)PDF資料
PDF描述
PI7C9X20404SLCFDE IC PCIE PACKET SWITCH 128LQFP
PI7C9X20505GPBNDE IC PCIE PACKET SWITCH 256BGA
PI7C9X20508GPBNDE IC PCIE PACKET SWITCH 256BGA
PI7C9X440SLBFDE IC PCIE-TO-USB 2.0 CTRLR 128LQFP
PI7C9X442SLBFDE IC PCIE-TO-USB2.0 SWIDGE 128LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C9X20404SLCEVB 制造商:Pericom Semiconductor Corporation 功能描述:PCIE 4 PORT SWITCH EVAL BOARD - Boxed Product (Development Kits)
PI7C9X20404SLCFDE 功能描述:外圍驅(qū)動器與原件 - PCI 4port 4lane PCIe Packet Switch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20404SLCFDEX 功能描述:外圍驅(qū)動器與原件 - PCI 4port 4lane PCIe Packet Switch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20505GPBNDE 功能描述:外圍驅(qū)動器與原件 - PCI 5port 5lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20508GPANDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*