TM Family Datasheet Page 14 of 79 June 2009 – " />
參數(shù)資料
型號： PI7C9X20404GPBNBE
廠商： Pericom
文件頁數(shù)： 6/79頁
文件大?。?/td> 0K
描述： IC PCIE PACKET SWITCH 148LFBGA
產(chǎn)品變化通告： Product Discontinuation Notice 22/Jan/2010
標(biāo)準(zhǔn)包裝： 189
系列： GreenPacket™
應(yīng)用： 封裝開關(guān)，4 端口/4 線道
接口： PCI Express
封裝/外殼： 148-LFBGA
供應(yīng)商設(shè)備封裝： 148-LFBGA（12x12）
包裝： 托盤
安裝類型： 表面貼裝
PI7C9X20404GP
4Port-4Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 14 of 79
June 2009 – Revision 1.6
Pericom Semiconductor
3.5
JTAG BOUNDARY SCAN SIGNALS
NAME
PIN
TYPE
DESCRIPTION
TCK
M10
I
Test Clock: Used to clock state information and data into and out of
the chip during boundary scan. When JTAG boundary scan function is
not implemented, this pin should be left open (NC).
TMS
P11
I
Test Mode Select: Used to control the state of the Test Access Port
controller. The pin has internal pull-up. When JTAG boundary scan
function is not implemented, this pin should be pulled low through a
5.1K pull-down resistor.
TDO
N10
O
Test Data Output: When SCAN_EN is high, it is used (in conjunction
with TCK) to shift data out of the Test Access Port (TAP) in a serial bit
stream. When JTAG boundary scan function is not implemented, this
pin should be left open (NC).
TDI
N11
I
Test Data Input: When SCAN_EN is high, it is used (in conjunction
with TCK) to shift data and instructions into the TAP in a serial bit
stream. The pin has internal pull-up. When JTAG boundary scan
function is not implemented, this pin should be left open (NC).
TRST_L
M11
I
Test Reset (Active LOW): Active LOW signal to reset the TAP
controller into an initialized state. The pin has internal pull-up. When
JTAG boundary scan function is not implemented, this pin should be
pulled low through a 5.1K pull-down resistor.
3.6
POWER PINS
NAME
PIN
TYPE
DESCRIPTION
VDDC
C7, F6, F7,
F9, G6, G7,
G9, H6, H7,
H9, J3, J6, J7,
J9
P
VDDC Supply (1.0V): Used as digital core power pins.
VDDR
A4, A9, C12,
H2, N6, P13
P
VDDR Supply (3.3V): Used as digital I/O power pins.
VDDA
C9, J12, J13,
J14, K13
P
VDDA Supply (1.0V): Used as analog power pins.
VDDCAUX
D3, L13
P
VDDCAUX Supply (1.0V): Used as auxiliary core power pins.
VAUX
A2
P
VAUX Supply (3.3V): Used as auxiliary I/O power pins.
VTT
F12, M12
P
Transmit Termination Voltage (1.5V): Provides driver termination
voltage at transmitter. Should be given the same consideration as
VDDCAUX.
VSS
A7, A11,
A13, B2, B7,
B9, B13, C8,
C10, C11,
C13, C14,
D13, E13, F8,
F13, F14, G8,
G13, H8,
H13, J8, M13,
M14, N13,
P1, P3, P9
P
VSS Ground: Used as ground pins.
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