參數資料
型號: PCD5003A
廠商: NXP Semiconductors N.V.
英文描述: Enhanced Pager Decoder for POCSAG
中文描述: 增強傳呼機POCSAG碼解碼器
文件頁數: 3/44頁
文件大?。?/td> 233K
代理商: PCD5003A
1999 Jan 08
3
Philips Semiconductors
Product specification
Enhanced Pager Decoder for POCSAG
PCD5003A
1
FEATURES
Wide operating supply voltage range: 1.5 to 6.0 V
EEPROM programming requires only 2.0 V supply
Low operating current: 50
μ
A typ. (ON),
25
μ
A typ. (OFF)
Temperature range:
25 to +70
°
C
“CCIR Radio paging Code No. 1”(POCSAG)
compatible
512, 1200 and 2400 bits/s data rates using 76.8 kHz
crystal
Built-in data filter (16-times oversampling) and bit clock
recovery
Advanced ACCESS
synchronization algorithm
2-bit random and (optional) 4-bit burst error correction
Up to 6 user addresses Receiver Identity Codes (RICs),
each with 4 functions/alert cadences
Up to 6 user address frames, independently
programmable
Optional automatic call termination when bit error rate is
high
Standard POCSAG sync word, plus up to 4 user
programmable sync words
Received data inversion (optional)
Call alert via beeper, vibrator or LED
2-level acoustic alert using single external transistor
Alert control: automatic (POCSAG type), via cadence
register or alert input pin
Separate power control of receiver and RF-oscillator for
battery economy
Dedicated pin for easy control of superheterodyne
receiver
Synthesizer set-up and control interface (3-line serial)
On-chip EEPROM for storage of user addresses (RICs),
pager configuration and synthesizer data
On-chip SRAM buffer for message data
Slave I
2
C-bus interface to microcontroller for transfer of
message data, status/control and EEPROM
programming (data transfer at up to 400 kbits/s)
Wake-up interrupt for microcontroller, programmable
polarity
Direct and I
2
C-bus control of operating status (ON/OFF)
Battery-low indication (external detector)
Out-of-range condition indication
Real-time clock reference output
On-chip voltage doubler
Interfaces directly to UAA2080 and UAA2082 paging
receivers.
2
APPLICATIONS
Display pagers, basic alert-only pagers
Information services
Personal organizers
Telepoint
Telemetry/data transmission.
3
GENERAL DESCRIPTION
The PCD5003A is a very low power POCSAG decoder
and pager controller. It supports data rates of 512,
1200 and 2400 bits/s using a single 76.8 kHz crystal.
On-chip EEPROM is programmable using a minimum
supply voltage of 2.0 V, allowing ‘over-the-air’
programming. The PCD5003A is fast I
2
C-bus compatible
(maximum 400 kbits/s).
4
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
PCD5003AH
LQFP32
plastic low profile quad flat package; 32 leads; body 7
×
7
×
1.4 mm
SOT358-1
相關PDF資料
PDF描述
PCD5003AH Enhanced Pager Decoder for POCSAG
PCD5003 Advanced POCSAG Paging Decoder
PCD5003H Advanced POCSAG Paging Decoder
PCD5008 FLEX Pager Decoder
PCD5008H FLEX Pager Decoder
相關代理商/技術參數
參數描述
PCD5003AH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced Pager Decoder for POCSAG
PCD5003H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Advanced POCSAG Paging Decoder
PCD5003HB-T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication Decoder
PCD5003U/10 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Advanced POCSAG Paging Decoder
PCD5008 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:FLEX Pager Decoder