參數(shù)資料
型號(hào): PC8265A
英文描述: PC8265A [Updated 9/03. 59 Pages]
中文描述: PC8265A [更新9 / 03。 59頁]
文件頁數(shù): 40/59頁
文件大?。?/td> 455K
代理商: PC8265A
40
PC8265A PowerQUICC II
5336A–HIREL–08/03
Figure 6 shows the SCC/SMC/SPI/I
2
C external clock.
Figure 6.
SCC/SMC/SPI/I
2
C External Clock Diagram
Note:
The clock edge is selectable on SCC and SPI.
Figure 7 shows the SCC/SMC/SPI/I
2
C internal clock.
Figure 7.
SCC/SMC/SPI/I
2
C Internal Clock Diagram
Note:
The clock edge is selectable on SCC and SPI
Figure 8 shows TDM input and output signals.
Figure 8.
TDM Signals Diagram
There are four possible TDM timing conditions:
1.
Input sampled on the rising edge and output driven on the rising edge (shown)
2.
Input sampled on the rising edge and output driven on the falling edge
3.
Input sampled on the falling edge and output driven on the falling edge
4.
Input sampled on the falling edge and output driven on the rising edge
sp19b
sp18b
sp38b/sp39b
Serial CLKin
SCC/SMC/SPI/I2C input signals
(See note.)
SCC/SMC/SPI/I2C output signals
(See note.)
sp19a
sp18a
sp38a/sp39a
BRG_OUT
SCC/SMC/SPI/I2C output signals
(See note.)
SCC/SMC/SPI/I2C input signals
(See note.)
sp20
sp40/sp41
Serial CLKin
TDM input signals
TDM output signals
sp21
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