參數(shù)資料
型號(hào)： PC8240
廠商： Atmel Corp.
英文描述： Integrated Processor Family
中文描述： 綜合處理器系列
文件頁(yè)數(shù)： 21/42頁(yè)
文件大小： 421K
代理商： PC8240
21
PC8240
2149A–HIREL–05/02
2. All PCI signals are measured from OVdd/2 of the rising edge of PCI_SYNC_IN to 0.4*OVdd of the signal in question for 3.3V
PCI signaling levels. See Figure 11.
3. Input timings are measured at the pin.
4. t
CLK
is the time of one SDRAM_SYNC_IN clock cycle.
5. All mode select input signals specifications are measured from the TTL level (0.8 or 2.0V) of the signal in question to the V
M
= 1.4V of the rising edge of the HRST_CPU/HRST_CTRL signal. See Figure 12.
Figure 10.
Input
–
Output Timing Diagram Referenced to SDRAM_SYNC_IN
Figure 11.
Input
–
Output Timing Diagram Referenced to PCI_SYNC_IN
Figure 12.
Input Timing Diagram for Mode Select Signals
11a
VM
VM = Midpoint Voltage (1.4V)
MEMORY
10b-d
PCI_SYNC_IN
INPUTS/OUTPUTS
13b
14b
VM
VM
SDRAM_SYNC_IN
shown in 2:1 mode
Input Timing
Output Timing
12b-d
2.0V
0.8V
0.8V
2.0V
OVdd/2
10a
11a
PCI_SYNC_IN
PCI
12a
13a
14a
OVdd/2
OVdd/2
0.4*OVdd
0.615*OVdd
0.285*OVdd
Input Timing
Output Timing
INPUTS/OUTPUTS
VM
VM = Midpoint Voltage (1.4V)
11b
MODE PINS
10e
HRST_CPU/HRST_CTRL
2.0V
0.8V
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