參數資料
型號： ORT8850
英文描述： Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
中文描述： 現場可編程系統(tǒng)芯片（促進文化基金）8通道x 850 Mbits /秒背板收發(fā)器
文件頁數： 49/112頁
文件大?。?/td> 2417K
代理商： ORT8850
Agere Systems Inc.
49
Data Sheet
August 2001
Eight-Channel x 850 Mbits/s Backplane Transceiver
ORCA
ORT8850 FPSC
Memory Map
(continued)
Table 12. Memory Map Descriptions
(continued)
Bit/Register Name(S)
Bit/Register
Location
(Hex)
21, 39, 51,
69, 81, 99,
b1, c9 [7]
Register
Type
Reset
Value
(Hex)
0
Description
tx mode of operation
tx e1 f2 e2 source select
tx s1 m0 source select
tx k1 k2 source select
tx d12~d9 source select
tx d8~d1 source select
21, 39, 51,
69, 81, 99,
b1, c9 [6]
21, 39, 51,
69, 81, 99,
b1, c9 [5]
21, 39, 51,
69, 81, 99,
b1,c9 [4:0]
22, 3a, 52,
6a,
82, 9a, b2, ca
[7:0]
23, 3b, 53,
6b, 83, 9b,
b3, cb [0]
creg
creg
creg
creg
creg
0
0
0
00
a1 a2 error insert command
b1 error insert command
disable b1 insert
disable a1 insert
23, 3b, 53,
6b, 83, 9b,
b3, cb [1]
23, 3b, 53,
6b, 83, 9b,
b3, cb [2]
23, 3b, 53,
6b, 83, 9b,
b3, cb [3]
24, 3c, 54,
6c, 84, 9c,
b4, cc [0:3]
creg
creg
0
0
concat indication 12, 9, 6, 3
concat indication 11, 8, 5, 2,
10, 7, 4, 1
25, 3d, 55,
6d, 85, 9d,
b5, cd [0:7]
sreg
sreg
0
0
The value 1 in any bit location indicates that STS# is in CONCAT
mode. A 0 indicates that the STS in not in CONCAT mode, or is the
head of a concat group.
Tx mode of operation:
Other registers:
0
Insert TOH from serial ports on FPGA interface.
1
Pass through all TOH of parallel stream.
0
Insert TOH from serial ports on FPGA interface.
1
Pass through that particular TOH byte.
The error insertion is based on a rising edge detector. As such,
the control must be set to value 0 before trying to initiate a sec-
ond a1 a2 corruption.
The error insertion is based on a rising edge detector. As such,
the conrtol mustbe set to value 0 before trying to initiate a second
0
Do not insert error.
1
Insert error for number of frames in register hex 0C.
0
Do not insert error.
1
Insert error for 1 frame in B1 bits defined by register hex 0F.
相關PDF資料
PDF描述
ORT8850H Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
ORT8850L Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
OS1001 Interface IC
OS1010 Optoelectronic
OS1011 SINGLE 1.8V, 200 KHZ OP, E TEMP, -40C to +125C, 8-PDIP, TUBE
相關代理商/技術參數
參數描述
ORT8850-FPSC-EV 功能描述:可編程邏輯 IC 開發(fā)工具 ORCA ORT8850 FPSC Eval Brd RoHS:否 制造商:Altera Corporation 產品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓:
ORT8850H 制造商:AGERE 制造商全稱:AGERE 功能描述:Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
ORT8850H-1BM680C 功能描述:FPGA - 現場可編程門陣列 16192 LUT 297 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT8850H-1BM680I 功能描述:FPGA - 現場可編程門陣列 16192 LUT 297 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT8850H-1BMN680C 功能描述:FPGA - 現場可編程門陣列 16192 LUT 297 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯系方式

*
*
*