參數(shù)資料
型號(hào)： ORT8850
英文描述： Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
中文描述： 現(xiàn)場(chǎng)可編程系統(tǒng)芯片（促進(jìn)文化基金）8通道x 850 Mbits /秒背板收發(fā)器
文件頁(yè)數(shù)： 106/112頁(yè)
文件大?。?/td> 2417K
代理商： ORT8850
106
Agere Systems Inc.
Data Sheet
August 2001
Eight-Channel x 850 Mbits/s Backplane Transceiver
ORCA
ORT8850 FPSC
Package Thermal Characteristics
Table 35
. ORCA
ORT8850 Plastic Package Thermal
Guidelines
* The 680-Pin PBGAM package includes 2 oz copper plates.
Package Coplanarity
The coplanarity limits of the Agere packages are as fol-
lows:
I
PBGAM: 8.0 mils
I
PBGA: 8.0 mils
Package Parasitics
The electrical performance of an IC package, such as
signal quality and noise sensitivity, is directly affected
by the package parasitics. Table 36 lists eight parasit-
ics associated with the
ORCA
packages. These para-
sitics represent the contributions of all components of a
package, which include the bond wires, all internal
package routing, and the external leads.
Four inductances in nH are listed: L
SW
and L
SL,
the
self-inductance of the lead; and L
MW
and L
ML
, the
mutual inductance to the nearest neighbor lead. These
parameters are important in determining ground
bounce noise and inductive crosstalk noise. Three
capacitances in pF are listed: C
M
, the mutual capaci-
tance of the lead to the nearest neighbor lead; and C
1
and C
2
, the total capacitance of the lead to all other
leads (all other leads are assumed to be grounded).
These parameters are important in determining capaci-
tive crosstalk and the capacitive loading effect of the
lead. Resistance values are in m
.
The parasitic values in
Table 36 are for the circuit
model of bond wire and package lead parasitics. If the
mutual capacitance value is not used in the designer
’
s
model, then the value listed as mutual capacitance
should be added to each of the C
1
and C
2
capacitors.
Package
Θ
JA
(
°
C/W)
T = 70
°
C Max,
T
J
= 125
°
C Max,
0 fpm (W)
0
fpm
19.0
200
fpm
16.0
500
fpm
15.0
352-Pin
PBGA
680-Pin
PBGAM
*
2.90
13.4
11.5
10.5
4.10
Table 36.
ORCA
ORT8850 Package Parasitics
5-3862(C)r2
Figure 25. Package Parasitics
Package Type
352-Pin PBGA
680-Pin PBGAM
L
SW
5.0
3.8
L
MW
2.0
1.3
R
W
220
250
C
1
1.5
1.0
C
2
1.5
1.0
C
M
1.5
0.3
L
SL
L
ML
7.0
—
12.0
2.8
—
5.0
3.0
—
6.0
0.5
—
1.0
PAD N
BOARD PAD
C
M
C
1
L
SW
R
W
L
SL
L
MW
C
2
C
1
L
ML
C
2
PAD N + 1
L
SW
R
W
L
SL
CIRCUIT
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ORT8850H 制造商:AGERE 制造商全稱:AGERE 功能描述:Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
ORT8850H-1BM680C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 16192 LUT 297 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT8850H-1BM680I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 16192 LUT 297 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT8850H-1BMN680C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 16192 LUT 297 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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