參數(shù)資料
型號： MT48LC4M32B2
廠商： Micron Technology, Inc.
英文描述： SYNCHRONOUS DRAM
中文描述： 同步DRAM
文件頁數(shù)： 50/52頁
文件大小： 1281K
代理商： MT48LC4M32B2
50
128Mb: x32 SDRAM
128MbSDRAMx32_D.p65 – Rev. D; Pub. 6/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
128Mb: x32
SDRAM
WRITE – FULL-PAGE BURST
NOTE:
1. A8, A9, and A11 = “Don’t Care.”
2.
3. Page left open; no
t
RP.
t
WR must be satisfied prior to PRECHARGE command.
*CAS latency indicated in parentheses.
-6
-7
SYMBOL*
t
CKH
t
CKS
t
CMH
t
CMS
t
DH
t
DS
t
RCD
MIN
1
1.5
1
2
1
1.5
18
MAX
MIN
1
2
1
2
1
2
20
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
TIMING PARAMETERS
-6
-7
SYMBOL*
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CK (1)
MIN
1
1.5
2.5
2.5
6
10
20
MAX
MIN
1
2
2.75
2.75
7
10
20
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
tCH
tCL
tCK
tRCD
CKE
CLK
A10
tCMS
tAH
tAS
tAH
tAS
ROW
ROW
Full-page burst does
not self-terminate. Can
use BURST TERMINATE
command to stop.
2, 3
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
Full page completed
COMMAND
tCMH
tCMS
NOP
NOP
NOP
ACTIVE
NOP
WRITE
BURST TERM
NOP
NOP
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
DQ
D
IN
m
tDH
tDS
D
IN
m
+ 1
D
IN
m
+ 2
D
IN
m
+ 3
tDH
tDS
tDH
tDS
tDH
tDS
D
IN
m
- 1
tDH
tDS
tAH
tAS
BANK
(
)
(
)
(
)
(
)
BANK
tCMH
tCKH
tCKS
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
256 locations within same row
COLUMN
m
1
T0
T1
T2
T3
T4
T5
Tn + 1
Tn + 2
Tn + 3
BA0, BA1
DQM 0-3
A0-A9, A11
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