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128Mb: x32 SDRAM
128MbSDRAMx32_D.p65 – Rev. D; Pub. 6/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
128Mb: x32
SDRAM
CLOCK SUSPEND MODE
1
NOTE:
1. For this example, the burst length = 2, the CAS latency = 3, and auto precharge is disabled.
2. A8, A9, and A11 = “Don’t Care.”
*CAS latency indicated in parentheses.
-6
-7
SYMBOL*
t
CKS
t
CMH
t
CMS
t
DH
t
DS
t
HZ (3)
t
HZ (2)
t
HZ (1)
t
LZ
t
OH
MIN
1.5
1
1.5
1
1.5
MAX
MIN
2
1
2
1
2
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5.5
7.5
17
5.5
8
17
1
2
1
2.5
TIMING PARAMETERS
-6
-7
SYMBOL*
t
AC (3)
t
AC (2)
t
AC (1)
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CK (1)
t
CKH
MIN
MAX
5.5
7.5
17
MIN
MAX
5.5
8
17
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
2
1.5
2.5
2.5
6
10
20
1
2.75
2.75
7
10
20
1
tCH
tCL
tCK
tAC
tLZ
DQM0-3
CLK
DQ
A10
tOH
D
OUT
m
tAH
tAS
tAH
tAS
tAH
tAS
BANK
tDH
D
OUT
e
tAC
tHZ
D
OUT
m + 1
COMMAND
tCMH
tCMS
NOP
NOP
NOP
NOP
NOP
READ
WRITE
DON’T CARE
UNDEFINED
CKE
tCKS
tCKH
BANK
COLUMN m
tDS
D
OUT
e + 1
NOP
tCKH
tCKS
tCMH
tCMS
2
COLUMN e
2
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
BA0, BA1
A0-A9, A11