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參數(shù)資料
| 型號： | MT28C3224P20 |
| 廠商： | Micron Technology, Inc. |
| 元件分類： | DRAM |
| 英文描述： | FLASH AND SRAM COMBO MEMORY |
| 中文描述： | 閃存和SRAM式內(nèi)存 |
| 文件頁數(shù)： | 13/42頁 |
| 文件大?。?/td> | 498K |
| 代理商： | MT28C3224P20 |
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2 Meg x 16 Page Flash 256K x 16 SRAM Combo Memory
MT28C3224P20_3.p65 – Rev. 3, Pub. 7/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
2 MEG x 16 PAGE FLASH
256K x 16 SRAM COMBO MEMORY
ADVANCE
Table 5
Command Descriptions (continued)
CODE DEVICE MODE
D0h
Erase Confirm
BUS CYCLE
Second
DESCRIPTION
If the previous command was an ERASE SETUP command, then the
CSM closes the address and data latches, and it begins erasing the
block indicated on the address pins. During programming/erase, the
device responds only to the READ STATUS REGISTER, PROGRAM
SUSPEND, or ERASE SUSPEND commands and outputs status register
data on the falling edge of F_OE# or F_CE#, whichever occurs last.
If a PROGRAM or ERASE operation was previously suspended, this
command resumes the operation.
During the array mode, array data is output on the data bus.
If the previous command was PROTECTION CONFIGURATION SETUP,
the CSM latches the address and locks the block indicated on the
address bus.
If the previous command was PROTECTION CONFIGURATION SETUP,
the CSM latches the address and locks down the block indicated on
the address bus.
If the previous command was PROTECTION CONFIGURATION SETUP,
the CSM latches the address and unlocks the block indicated on the
address bus. If the block had been previously set to lock down, this
operation has no effect.
Unassigned command that should not be used.
Program/Erase
Resume
Read Array
Lock Block
First
FFh
01h
First
Second
2Fh
Lock Down
Second
D0h
Unlock Block
Second
00h
Invalid/Reserved
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