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參數(shù)資料
| 型號(hào)： | MT16LSDT464A |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 4 Meg x 64 SDRAM DIMMs(4M x 64同步動(dòng)態(tài)RAM,雙列直插存儲(chǔ)器模塊) |
| 中文描述： | 4梅格× 64 SDRAM的內(nèi)存插槽（4米× 64同步動(dòng)態(tài)內(nèi)存，雙列直插存儲(chǔ)器模塊） |
| 文件頁數(shù)： | 10/19頁 |
| 文件大小： | 257K |
| 代理商： | MT16LSDT464A |
2, 4 Meg x 64 SDRAM DIMMs
ZM02.p65 – Rev. 6/98
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1998, Micron Technology, Inc.
10
2, 4 MEG x 64
SDRAM DIMMs
OBSOLETE
COMMANDS
Truth Table 1 provides a general reference of available
commands. For a more detailed description of commands
and operations, refer to the 16Mb: x4, x8 SDRAM data sheet.
NOTE:
1. CKE is HIGH for all commands shown except SELF REFRESH.
2. A0-A10 and BA0 define the op-code written to the Mode Register.
3. A0-A10 provide row address, and BA0 determines which bank is made active (BA0 LOW = Bank 0; BA0
HIGH = Bank 1).
4. A0-A8 provide column address; A10 HIGH enables the auto precharge feature (nonpersistent), while A10
LOW disables the auto precharge feature; BA0 determines which bank is being read from or written to
(BA0 LOW = Bank 0; BA0 HIGH = Bank 1).
5. A10 LOW: BA0 determines which bank is being precharged (BA0 LOW = Bank 0; BA0 HIGH = Bank 1).
A10 HIGH: both banks are precharged and BA0 is “Don’t Care.”
6. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t Care” except for CKE.
8. Activates or deactivates the DQs during WRITEs (zero-clock delay) and READs (two-clock delay).
TRUTH TABLE 1 – Commands and DQMB Operation
(Notes: 1)
NAME (FUNCTION)
COMMAND INHIBIT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
READ (Select bank and column, and start READ burst)
WRITE (Select bank and column, and start WRITE burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO REFRESH or
SELF REFRESH (Enter self refresh mode)
LOAD MODE REGISTER
Write Enable/Output Enable
Write Inhibit/Output High-Z
CS#
H
L
L
L
L
L
L
L
RAS# CAS# WE# DQMB
X
X
H
H
L
H
H
L
H
L
H
H
L
H
L
L
ADDR
X
X
Bank/Row
Bank/Col
Bank/Col Valid
X
Code
X
DQs
X
X
X
X
NOTES
X
H
H
H
L
L
L
H
X
X
X
X
X
X
X
X
3
4
4
Active
X
X
5
6, 7
L
–
–
L
–
–
L
–
–
L
–
–
X
L
H
Op-code
–
–
X
2
8
8
Active
High-Z
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