參數(shù)資料
型號(hào)： MSC8144
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
元件分類： 數(shù)字信號(hào)處理
英文描述： Quad Core Digital Signal Processor
中文描述： 四核心數(shù)字信號(hào)處理器
文件頁數(shù)： 75/80頁
文件大小： 1146K
代理商： MSC8144
Hardware Design Considerations
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 1
Freescale Semiconductor
75
3.3.8
Miscellaneous Pins
Table 68
lists the board connections for the pins if they are required by the system design.
Table 68
assumes that the alternate
function of the specified pin is not used. If the alternate function is used, connect that pin as required to support the selected
function.
Note:
For details on configuration, see the
MSC8144 Reference Manual
. For additional information, refer to the
MSC8144
Design Checklist
(AN3202).
3.4
TBD
External DDR SDRAM Selection
Table 68. Connectivity of Individual Pins When They Are Not Required
Signal Name
Pin Connection
CLKOUT
NC
EE0
GND
EE1
NC
GPIO[0–31]
NC
SCL
See the GPIO connectivity guidelines in this table.
SDA
See the GPIO connectivity guidelines in this table.
INT_OUT
NC
IRQ[0–15]
See the GPIO connectivity guidelines in this table.
NMI
V
DDIO
NMI_OUT
NC
RC[0–16]
GND
RC_LDF
NC
STOP_BS
GND
TCK
GND
TDI
GND
TDO
NC
TMR[0–4]
See the GPIO connectivity guidelines in this table.
TMS
GND
TRST
GND
URXD
See the GPIO connectivity guidelines in this table.
UTXD
See the GPIO connectivity guidelines in this table.
V
DDIO
3.3 V
Note:
When using I/O multiplexing mode 5 or 6, tie the TDM7TSYN/PCI_AD4 signal (ball number AC9) to GND.
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